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path: root/drivers/serial/serial_mxc.c
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Diffstat (limited to 'drivers/serial/serial_mxc.c')
-rw-r--r--drivers/serial/serial_mxc.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 56bee55208..bfc473bf66 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -96,6 +96,7 @@
#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */
#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */
#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */
+#define UFCR_DCEDTE (1<<6) /* DCE=0 */
#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */
#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */
#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */
@@ -137,7 +138,7 @@ static void mxc_serial_setbrg(void)
if (!gd->baudrate)
gd->baudrate = CONFIG_BAUDRATE;
- __REG(UART_PHYS + UFCR) = 4 << 7; /* divide input clock by 2 */
+ __REG(UART_PHYS + UFCR) = (__REG(UART_PHYS + UFCR) & ~UFCR_RFDIV) | (4 << 7); /* divide input clock by 2 */
__REG(UART_PHYS + UBIR) = 0xf;
__REG(UART_PHYS + UBMR) = clk / (2 * gd->baudrate);
@@ -193,6 +194,13 @@ static int mxc_serial_init(void)
__REG(UART_PHYS + UTS) = 0x0;
+ __REG(UART_PHYS + UFCR) =
+#ifdef CONFIG_MXC_UART_DTE
+ UFCR_DCEDTE;
+#else
+ 0;
+#endif
+
serial_setbrg();
__REG(UART_PHYS + UCR2) = UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST;