diff options
Diffstat (limited to 'board/innokom')
| -rw-r--r-- | board/innokom/flash.c | 3 | ||||
| -rw-r--r-- | board/innokom/innokom.c | 7 | ||||
| -rw-r--r-- | board/innokom/memsetup.S | 27 |
3 files changed, 15 insertions, 22 deletions
diff --git a/board/innokom/flash.c b/board/innokom/flash.c index 32c57d8d96..b7c2072e70 100644 --- a/board/innokom/flash.c +++ b/board/innokom/flash.c @@ -10,7 +10,8 @@ * Robert Schwebel, Pengutronix, <r.schwebel@pengutronix.de> * * (C) Copyright 2002 - * Kai-Uwe Bloem, GDS, <kai-uwe.bloem@auerswald.de> + * Auerswald GmbH & Co KG, Germany + * Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de> * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c index 5ee511764a..da238da6c7 100644 --- a/board/innokom/innokom.c +++ b/board/innokom/innokom.c @@ -48,7 +48,7 @@ int i2c_init_board(void) icr = ICR; ICR &= ~(ICR_SCLE | ICR_IUE); /* set gpio pin low _before_ we change direction to output */ - GPCR(70) = GPIO_bit(70); + GPCR(70) = GPIO_bit(70); /* now toggle between output=low and high-impedance */ for (i = 0; i < 20; i++) { @@ -100,13 +100,8 @@ int board_init (void) /* memory and cpu-speed are setup before relocation */ /* so we do _nothing_ here */ - /* arch number of Innokom board */ gd->bd->bi_arch_number = MACH_TYPE_INNOKOM; - - /* adress of boot parameters */ gd->bd->bi_boot_params = 0xa0000100; - - /* baud rate */ gd->bd->bi_baudrate = CONFIG_BAUDRATE; return 0; diff --git a/board/innokom/memsetup.S b/board/innokom/memsetup.S index a2bc99d12d..60f9d50b58 100644 --- a/board/innokom/memsetup.S +++ b/board/innokom/memsetup.S @@ -237,17 +237,16 @@ mem_init: /* ---------------------------------------------------------------- */ /* Before accessing MDREFR we need a valid DRI field, so we set */ - /* this to power on defaults + DIR field. */ + /* this to power on defaults + DRI field. */ - ldr r4, =0x03ca4fff - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r3, =CFG_MDREFR_VAL + ldr r2, =0xFFF + and r3, r3, r2 + ldr r4, =0x03ca4000 + orr r4, r4, r3 - ldr r4, =0x03ca4030 str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - /* Note: preserve the mdrefr value in r4 */ + ldr r4, [r1, #MDREFR_OFFSET] /* ---------------------------------------------------------------- */ @@ -267,18 +266,16 @@ mem_init: /* Step 4: Initialize SDRAM */ /* ---------------------------------------------------------------- */ - /* Step 4a: assert MDREFR:K1RUN and MDREFR:K2RUN and configure */ + /* Step 4a: assert MDREFR:K?RUN and configure */ /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ - orr r4, r4, #(MDREFR_K1RUN|MDREFR_K0RUN) - - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - + ldr r4, =CFG_MDREFR_VAL + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4b: de-assert MDREFR:SLFRSH. */ - bic r4, r4, #(MDREFR_SLFRSH) + bic r4, r4, #(MDREFR_SLFRSH) str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ ldr r4, [r1, #MDREFR_OFFSET] |