diff options
Diffstat (limited to 'arch/arm/include/asm/imx-common/sci/svc/irq/api.h')
| -rw-r--r-- | arch/arm/include/asm/imx-common/sci/svc/irq/api.h | 62 |
1 files changed, 35 insertions, 27 deletions
diff --git a/arch/arm/include/asm/imx-common/sci/svc/irq/api.h b/arch/arm/include/asm/imx-common/sci/svc/irq/api.h index 49ecb3e5b9..391836db15 100644 --- a/arch/arm/include/asm/imx-common/sci/svc/irq/api.h +++ b/arch/arm/include/asm/imx-common/sci/svc/irq/api.h @@ -25,7 +25,7 @@ /* Defines */ -#define SC_IRQ_NUM_GROUP 4 /*!< Number of groups */ +#define SC_IRQ_NUM_GROUP 5U /*!< Number of groups */ /*! * @name Defines for sc_irq_group_t @@ -35,56 +35,64 @@ #define SC_IRQ_GROUP_WDOG 1U /*!< Watchdog interrupts */ #define SC_IRQ_GROUP_RTC 2U /*!< RTC interrupts */ #define SC_IRQ_GROUP_WAKE 3U /*!< Wakeup interrupts */ +#define SC_IRQ_GROUP_SYSCTR 4U /*!< System counter interrupts */ /*@}*/ /*! * @name Defines for sc_irq_temp_t */ /*@{*/ -#define SC_IRQ_TEMP_HIGH (1U << 0) /*!< Temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU0_HIGH (1U << 1) /*!< CPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU1_HIGH (1U << 2) /*!< CPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU0_HIGH (1U << 3) /*!< GPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU1_HIGH (1U << 4) /*!< GPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC0_HIGH (1U << 5) /*!< DRC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC1_HIGH (1U << 6) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_VPU_HIGH (1U << 7) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC0_HIGH (1U << 8) /*!< PMIC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC1_HIGH (1U << 9) /*!< PMIC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_LOW (1U << 10) /*!< Temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU0_LOW (1U << 11) /*!< CPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_CPU1_LOW (1U << 12) /*!< CPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU0_LOW (1U << 13) /*!< GPU0 temp alarm interrupt */ -#define SC_IRQ_TEMP_GPU1_LOW (1U << 14) /*!< GPU1 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC0_LOW (1U << 15) /*!< DRC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_DRC1_LOW (1U << 16) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_VPU_LOW (1U << 17) /*!< DRC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC0_LOW (1U << 18) /*!< PMIC0 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC1_LOW (1U << 19) /*!< PMIC1 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC2_HIGH (1U << 20) /*!< PMIC2 temp alarm interrupt */ -#define SC_IRQ_TEMP_PMIC2_LOW (1U << 21) /*!< PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_HIGH (1U << 0U) /*!< Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_HIGH (1U << 1U) /*!< CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_HIGH (1U << 2U) /*!< CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_HIGH (1U << 3U) /*!< GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_HIGH (1U << 4U) /*!< GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_HIGH (1U << 5U) /*!< DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_HIGH (1U << 6U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_HIGH (1U << 7U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_HIGH (1U << 8U) /*!< PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_HIGH (1U << 9U) /*!< PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_LOW (1U << 10U) /*!< Temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU0_LOW (1U << 11U) /*!< CPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_CPU1_LOW (1U << 12U) /*!< CPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU0_LOW (1U << 13U) /*!< GPU0 temp alarm interrupt */ +#define SC_IRQ_TEMP_GPU1_LOW (1U << 14U) /*!< GPU1 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC0_LOW (1U << 15U) /*!< DRC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_DRC1_LOW (1U << 16U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_VPU_LOW (1U << 17U) /*!< DRC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC0_LOW (1U << 18U) /*!< PMIC0 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC1_LOW (1U << 19U) /*!< PMIC1 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_HIGH (1U << 20U) /*!< PMIC2 temp alarm interrupt */ +#define SC_IRQ_TEMP_PMIC2_LOW (1U << 21U) /*!< PMIC2 temp alarm interrupt */ /*@}*/ /*! * @name Defines for sc_irq_wdog_t */ /*@{*/ -#define SC_IRQ_WDOG (1U << 0) /*!< Watchdog interrupt */ +#define SC_IRQ_WDOG (1U << 0U) /*!< Watchdog interrupt */ /*@}*/ /*! * @name Defines for sc_irq_rtc_t */ /*@{*/ -#define SC_IRQ_RTC (1U << 0) /*!< RTC interrupt */ +#define SC_IRQ_RTC (1U << 0U) /*!< RTC interrupt */ /*@}*/ /*! * @name Defines for sc_irq_wake_t */ /*@{*/ -#define SC_IRQ_BUTTON (1U << 0) /*!< Button interrupt */ -#define SC_IRQ_PAD (1U << 1) /*!< Pad wakeup */ +#define SC_IRQ_BUTTON (1U << 0U) /*!< Button interrupt */ +#define SC_IRQ_PAD (1U << 1U) /*!< Pad wakeup */ +/*@}*/ + +/*! + * @name Defines for sc_irq_sysctr_t + */ +/*@{*/ +#define SC_IRQ_SYSCTR (1U << 0U) /*!< SYSCTR interrupt */ /*@}*/ /* Types */ |