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Diffstat (limited to 'arch/arm/dts/k3-am625-verdin.dts')
-rw-r--r--arch/arm/dts/k3-am625-verdin.dts379
1 files changed, 379 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-am625-verdin.dts b/arch/arm/dts/k3-am625-verdin.dts
new file mode 100644
index 0000000000..0c07cad51c
--- /dev/null
+++ b/arch/arm/dts/k3-am625-verdin.dts
@@ -0,0 +1,379 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2023 Toradex
+ */
+
+/dts-v1/;
+
+/* remove once our HW arrives */
+#define SKEVM
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+#include "k3-am625.dtsi"
+
+/ {
+ compatible = "toradex,verdin-am62", "ti,am625";
+ model = "Toradex Verdin AM62";
+
+ aliases {
+ ethernet0 = &cpsw_port1;
+ i2c0 = &main_i2c0;
+ i2c1 = &main_i2c1;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ serial2 = &main_uart0;
+ };
+
+ chosen {
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */
+ };
+
+ /* Verdin SD_1 Power Supply */
+ reg_sdhc1_vmmc: regulator-sdhci1 {
+ compatible = "regulator-fixed";
+#ifdef SKEVM
+ enable-active-high;
+ gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
+#else
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sd1_pwr_en>;
+ enable-active-high;
+ /* Verdin SD_1_PWR_EN (SODIMM 76) */
+ gpio = <&main_gpio0 29 GPIO_ACTIVE_HIGH>;
+#endif
+ off-on-delay-us = <100000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "+V3.3_SD";
+ startup-delay-us = <2000>;
+ };
+
+ reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_vsel_sd>;
+ /* PMIC_VSEL_SD */
+#ifdef SKEVM
+ gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
+#else
+ gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
+#endif
+ regulator-name = "LDO1-VSEL-SD (PMIC)";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
+// vin-supply = <&reg_sd_3v3_1v8>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ rtos_ipc_memory_region: ipc-memories@9c800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9c800000 0x00 0x00300000>;
+ no-map;
+ };
+
+ mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cb00000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_m4fss_memory_region: m4f-memory@9cc00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9cc00000 0x00 0xe00000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9da00000 0x00 0x00100000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9db00000 0x00 0x00c00000>;
+ no-map;
+ };
+
+ lpm_ctx_ddr: lpm-memory@9e700000 {
+ reg = <0x00 0x9e700000 0x00 0x80000>;
+ alignment = <0x1000>;
+ };
+
+ secure_tfa_ddr: tfa@9e780000 {
+ reg = <0x00 0x9e780000 0x00 0x80000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+
+ secure_ddr: optee@9e800000 {
+ reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+};
+
+&cpsw3g {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio // TBD: move pinctrl to &cpsw3g_mdio ?
+ &pinctrl_rgmii1>; // TODO: move pinctrl to &cpsw_port1 ?
+};
+
+/* MDIO, shared between Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
+&cpsw3g_mdio {
+ cpsw3g_phy0: ethernet-phy@0 {
+ reg = <0>;
+#ifndef SKEVM
+ assigned-clocks = <&k3_clks 157 20>;
+ assigned-clock-parents = <&k3_clks 157 22>;
+ assigned-clock-rates = <25000000>;
+ interrupt-parent = <&main_gpio0>;
+ interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eth_clock &pinctrl_eth_int &pinctrl_eth_reset>;
+ reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10>;
+ reset-deassert-us = <1000>;
+#endif
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,min-output-impedance;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ };
+};
+
+/* Verdin ETH_1 (On-module PHY) */
+&cpsw_port1 {
+ phy-handle = <&cpsw3g_phy0>;
+ phy-mode = "rgmii-rxid";
+};
+
+/* On-module I2C - PMIC_I2C */
+&main_i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ eeprom_module: eeprom@50 {
+ compatible = "st,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+/* Verdin I2C_1 */
+&main_i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+#ifdef SKEVM
+ clock-frequency = <400000>;
+
+ exp1: gpio@22 {
+ compatible = "ti,tca6424";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
+ "PRU_DETECT", "MMC1_SD_EN",
+ "VPP_LDO_EN", "EXP_PS_3V3_En",
+ "EXP_PS_5V0_En", "EXP_HAT_DETECT",
+ "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
+ "UART1_FET_BUF_EN", "WL_LT_EN",
+ "GPIO_HDMI_RSTn", "CSI_GPIO1",
+ "CSI_GPIO2", "PRU_3V3_EN",
+ "HDMI_INTn", "TEST_GPIO2",
+ "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
+ "MCASP1_FET_SEL", "UART1_FET_SEL",
+ "TSINT#", "IO_EXP_TEST_LED";
+ };
+#endif
+
+ /* EEPROM on display adapter (MIPI DSI Display Adapter) */
+ eeprom_display_adapter: eeprom@50 {
+ compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ /* EEPROM on carrier board */
+ eeprom_carrier_board: eeprom@57 {
+ compatible = "st,24c02", "atmel,24c02", "i2c-eeprom";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+};
+
+&main_pmx0 {
+ /* PMIC_ETH_RESET# */
+ pinctrl_eth_reset: main-gpio0-17-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x0044, PIN_INPUT, 7) /* (N24) GPMC0_AD2.GPIO0_17 */
+ > ;
+ };
+
+ /* PMIC_VSEL_SD */
+ pinctrl_vsel_sd: main-gpio0-21-pins-default {
+ pinctrl-single,pins = <
+#ifndef SKEVM
+ AM62X_IOPAD(0x0054, PIN_INPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */
+#else
+ AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
+#endif
+ >;
+ };
+
+ /* PMIC_ETH_INT# */
+ pinctrl_eth_int: main-gpio0-25-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x0064, PIN_INPUT_PULLUP, 7) /* (T25) GPMC0_AD10.GPIO0_25 */
+ >;
+ };
+
+ /* Verdin SD_1_PWR_EN */
+ pinctrl_sd1_pwr_en: main-gpio0-29-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x0074, PIN_INPUT, 7) /* (U25) GPMC0_AD14.GPIO0_29 */ /* SODIMM 76 */
+ >;
+ };
+
+ /* Verdin CTRL_SLEEP_MOCI# */
+ pinctrl_ctrl_sleep_moci: main-gpio0-31-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x007c, PIN_INPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ /* SODIMM 256 */
+ >;
+ };
+
+ /* On-module I2C - PMIC_I2C */
+ pinctrl_i2c0: main-i2c0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x01e0, PIN_INPUT, 0) /* (B16) I2C0_SCL */ /* PMIC_I2C_SCL */
+ AM62X_IOPAD(0x01e4, PIN_INPUT, 0) /* (A16) I2C0_SDA */ /* PMIC_I2C_SDA */
+ >;
+ };
+
+ /* Verdin I2C_1 */
+ pinctrl_i2c1: main-i2c1-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ /* SODIMM 14 */
+ AM62X_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ /* SODIMM 12 */
+ >;
+ };
+
+ /* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
+ pinctrl_mdio: main-mdio1-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ /* ETH_1_MDC, SODIMM 193 */
+ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM 191 */
+ >;
+ };
+
+ /* On-module eMMC */
+ pinctrl_sdhci0: main-mmc0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
+ AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
+ AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
+ AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
+ AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
+ AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
+ AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
+ AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
+ AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
+ AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
+ >;
+ };
+
+ /* Verdin SD_1 */
+ pinctrl_sdhci1: main-mmc1-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ /* SODIMM 74 */
+ AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
+ AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */
+ AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */
+ AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */
+ AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */
+ AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */
+ >;
+ };
+
+ /* Verdin ETH_1 RGMII (On-module PHY) */
+ pinctrl_rgmii1: main-rgmii1-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
+ AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
+ AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
+ AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
+ AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
+ AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
+ AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
+ AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
+ AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
+ AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
+ AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
+ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
+ >;
+ };
+
+ /* ETH_25MHz_CLK */
+ pinctrl_eth_clock: main-system-clkout0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x01f0, PIN_OUTPUT_PULLUP, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
+ >;
+ };
+
+ /* Verdin UART_3, used as the Linux console */
+ pinctrl_uart0: main-uart0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ /* SODIMM 147 */
+ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ /* SODIMM 149 */
+ >;
+ };
+};
+
+/* Verdin UART_3, used as the Linux console */
+&main_uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ status = "disabled";
+};
+
+/* On-module eMMC */
+&sdhci0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci0>;
+ non-removable;
+ ti,driver-strength-ohm = <50>;
+ status = "okay";
+};
+
+/* Verdin SD_1 */
+&sdhci1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci1>;
+ disable-wp;
+ ti,driver-strength-ohm = <50>;
+ vmmc-supply = <&reg_sdhc1_vmmc>;
+ vqmmc-supply = <&reg_sdhc1_vqmmc>;
+ status = "okay";
+};
+
+/* Verdin USB_1 */
+&usbss0 {
+ ti,vbus-divider;
+};
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-23 11:26:15 +0000