diff options
Diffstat (limited to 'arch/arm/dts/fsl-imx8qm-apalis.dts')
| -rw-r--r-- | arch/arm/dts/fsl-imx8qm-apalis.dts | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/arm/dts/fsl-imx8qm-apalis.dts b/arch/arm/dts/fsl-imx8qm-apalis.dts index 2a5634e21f..b06021b2b1 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis.dts +++ b/arch/arm/dts/fsl-imx8qm-apalis.dts @@ -190,9 +190,7 @@ pinctrl_usdhc2_gpio: usdhc2grpgpio { fsl,pins = < - SC_P_USDHC1_DATA6_LSIO_GPIO5_IO21 0x00000021 - SC_P_USDHC1_DATA7_LSIO_GPIO5_IO22 0x00000021 - SC_P_USDHC1_RESET_B_LSIO_GPIO4_IO07 0x00000021 + SC_P_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 >; }; @@ -204,6 +202,10 @@ SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000021 + SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000021 + SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000021 + SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000021 SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 >; }; @@ -216,6 +218,10 @@ SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020 + SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020 + SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020 + SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020 SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 >; }; @@ -228,6 +234,10 @@ SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020 + SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020 + SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020 + SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020 SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 >; }; @@ -240,8 +250,6 @@ SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 - /* WP */ - SC_P_USDHC2_WP_LSIO_GPIO4_IO11 0x00000021 /* CD */ SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021 >; @@ -329,8 +337,7 @@ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; bus-width = <4>; - cd-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; status = "okay"; }; @@ -340,7 +347,6 @@ pinctrl-0 = <&pinctrl_usdhc3>; bus-width = <4>; cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; |