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Diffstat (limited to 'arch/arm/cpu/armv7/tegra3/display.c')
-rw-r--r--arch/arm/cpu/armv7/tegra3/display.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra3/display.c b/arch/arm/cpu/armv7/tegra3/display.c
new file mode 100644
index 0000000000..8f67af77fc
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra3/display.c
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2011
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/clocks.h>
+#include <asm/arch/clock.h>
+
+void display_clk_init(void)
+{
+ /* TODO: Put this into the FDT when we have clock support there */
+ clock_start_periph_pll(PERIPH_ID_VI, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_3D, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_2D, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_HOST1X, CLOCK_ID_CGENERAL, CLK_114M);
+ clock_start_periph_pll(PERIPH_ID_3D2, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_EPP, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_VDE, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_MPE, CLOCK_ID_CGENERAL, CLK_228M);
+ clock_start_periph_pll(PERIPH_ID_DISP1, CLOCK_ID_PERIPH, CLK_408M);
+ clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_PERIPH, CLK_3_1875M);
+}