diff options
| -rw-r--r-- | arch/arm/dts/fsl-imx8qxp-colibri.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts index 6195122a26..ccdff0009f 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri.dts +++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts @@ -70,8 +70,8 @@ pinctrl_fec1: fec1grp { fsl,pins = < - SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0 /* Use pads in 3.3V mode */ - SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0 /* Use pads in 3.3V mode */ + SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0 /* Use pads in 3.3V mode */ + SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0 /* Use pads in 3.3V mode */ SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x00000061 @@ -93,7 +93,7 @@ pinctrl_hog0: hog0grp { fsl,pins = < - SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 /* Use pads in 3.3V mode */ + SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 /* Use pads in 3.3V mode */ >; }; @@ -113,9 +113,9 @@ SC_P_CSI_D03_CI_PI_D05 0x00000061 SC_P_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x00000020 /* 99 */ SC_P_SAI0_TXFS_LSIO_GPIO0_IO28 0x00000020 /* 101 */ - SC_P_CSI_D00_CI_PI_D02 0x00000061 + SC_P_CSI_D00_CI_PI_D02 0x00000061 SC_P_SAI0_TXD_LSIO_GPIO0_IO25 0x00000020 /* 103 */ - SC_P_CSI_D01_CI_PI_D03 0x00000061 + SC_P_CSI_D01_CI_PI_D03 0x00000061 SC_P_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x00000020 /* 105 */ SC_P_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x00000020 /* 107 */ SC_P_USB_SS3_TC2_LSIO_GPIO4_IO05 0x00000020 /* 127 */ |