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-rw-r--r--arch/arm/cpu/armv8/imx8m/clock_imx8mq.c1
-rw-r--r--arch/arm/cpu/armv8/imx8m/soc.c20
2 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv8/imx8m/clock_imx8mq.c b/arch/arm/cpu/armv8/imx8m/clock_imx8mq.c
index 7953d59635..389a61666c 100644
--- a/arch/arm/cpu/armv8/imx8m/clock_imx8mq.c
+++ b/arch/arm/cpu/armv8/imx8m/clock_imx8mq.c
@@ -659,6 +659,7 @@ int clock_init()
clock_enable(CCGR_WDOG3, 1);
clock_enable(CCGR_TSENSOR, 1);
+ clock_enable(CCGR_OCOTP, 1);
return 0;
};
diff --git a/arch/arm/cpu/armv8/imx8m/soc.c b/arch/arm/cpu/armv8/imx8m/soc.c
index 9578be616c..68cc01f3b1 100644
--- a/arch/arm/cpu/armv8/imx8m/soc.c
+++ b/arch/arm/cpu/armv8/imx8m/soc.c
@@ -229,14 +229,20 @@ u32 get_cpu_rev(void)
/* iMX8MQ */
if (reg == 0x10) {
/* For B0 chip, the DIGPROG is not updated, still TO1.0.
- * we have to check ROM version further
+ * we have to check ROM version or OCOTP_READ_FUSE_DATA
*/
- uint32_t rom_version;
- rom_version = readl((void __iomem *)0x800);
- if (rom_version != 0x10) {
- rom_version = readl((void __iomem *)0x83c);
- if (rom_version >= 0x20)
- reg = 0x20;
+ if (readl((void __iomem *)(OCOTP_BASE_ADDR + 0x40))
+ == 0xff0055aa) {
+ /* 0xff0055aa is magic number for B1 */
+ reg = 0x21;
+ } else {
+ uint32_t rom_version;
+ rom_version = readl((void __iomem *)0x800);
+ if (rom_version != 0x10) {
+ rom_version = readl((void __iomem *)0x83c);
+ if (rom_version == 0x20)
+ reg = 0x20;
+ }
}
}