diff options
102 files changed, 1992 insertions, 2495 deletions
@@ -232,10 +232,10 @@ config SYS_MALLOC_F_LEN depends on SYS_MALLOC_F default 0x1000 if AM33XX default 0x4000 if SANDBOX - default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \ - ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \ - ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A || \ - ARCH_LS1046A || ARCH_QEMU || ARCH_SUNXI || ARCH_OWL) + default 0x2000 if (ARCH_MX7 || ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \ + ARCH_QEMU || ARCH_SUNXI || ARCH_OWL) + default 0x10000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_LS1012A || \ + ARCH_LS1021A || ARCH_LS1043A || ARCH_LS1046A) default 0x400 help Before relocation, memory is very limited on many platforms. Still, @@ -2445,10 +2445,13 @@ endif $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost quiet_cmd_genenv = GENENV $@ -cmd_genenv = $(OBJCOPY) --dump-section .rodata.default_environment=$@ env/common.o; \ - sed --in-place -e 's/\x00/\x0A/g' $@ +cmd_genenv = \ + $(objtree)/tools/printinitialenv | \ + sed -e '/^\s*$$/d' | \ + sort --field-separator== -k1,1 --stable -o $@ -u-boot-initial-env: u-boot.bin +u-boot-initial-env: $(env_h) FORCE + $(Q)$(MAKE) $(build)=tools $(objtree)/tools/printinitialenv $(call if_changed,genenv) # Consistency checks diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 39b6a2b1b5..09da1b375b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1811,11 +1811,6 @@ config TARGET_TEN64 Support for Traverse Technologies Ten64 board, based on NXP LS1088A. -config TARGET_COLIBRI_PXA270 - bool "Support colibri_pxa270" - select CPU_PXA27X - select GPIO_EXTRA_HEADER - config ARCH_UNIPHIER bool "Socionext UniPhier SoCs" select BOARD_LATE_INIT @@ -2263,7 +2258,6 @@ source "board/seeed/npi_imx6ull/Kconfig" source "board/socionext/developerbox/Kconfig" source "board/st/stv0991/Kconfig" source "board/tcl/sl50/Kconfig" -source "board/toradex/colibri_pxa270/Kconfig" source "board/traverse/ten64/Kconfig" source "board/variscite/dart_6ul/Kconfig" source "board/vscom/baltos/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 709fdaecd7..45a79f0201 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -942,7 +942,6 @@ dtb-$(CONFIG_ARCH_IMX8) += \ imx8qm-rom7720-a1.dtb \ fsl-imx8qxp-ai_ml.dtb \ fsl-imx8qxp-colibri.dtb \ - fsl-imx8qxp-apalis.dtb \ fsl-imx8qxp-mek.dtb \ fsl-imx8qxp-lpddr4-val.dtb \ fsl-imx8qxp-lpddr4-val-gpmi-nand.dtb \ diff --git a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi index 956d724979..22b34c8feb 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi @@ -2,6 +2,32 @@ /* * Copyright 2019 Toradex AG */ +/ { + aliases { + usbhost1 = &usbh3; + usbgadget0 = &usbg1; + }; + + usbh3: usbh3 { + compatible = "Cadence,usb3-host"; + dr_mode = "host"; + cdns3,usb = <&usbotg3>; + status = "okay"; + }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + u-boot,dm-pre-proper; + }; +}; + +&{/imx8qm-pm} { + + u-boot,dm-pre-proper; +}; &mu { u-boot,dm-pre-proper; @@ -75,6 +101,22 @@ u-boot,dm-pre-proper; }; +&pd_conn_usbotg0 { + u-boot,dm-pre-proper; +}; + +&pd_conn_usbotg0_phy { + u-boot,dm-pre-proper; +}; + +&pd_conn_usb2 { + u-boot,dm-pre-proper; +}; + +&pd_conn_usb2_phy { + u-boot,dm-pre-proper; +}; + &gpio0 { u-boot,dm-pre-proper; }; @@ -93,6 +135,12 @@ &gpio4 { u-boot,dm-pre-proper; + + usbh_en { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + }; }; &gpio5 { @@ -123,6 +171,32 @@ u-boot,dm-pre-proper; }; +/* USB */ +&usbmisc1 { + u-boot,dm-pre-proper; +}; + +&usbphy1 { + u-boot,dm-pre-proper; +}; + +&usbotg1 { + dr_mode = "host"; + u-boot,dm-pre-proper; +}; + +&usbphynop1 { + compatible = "cdns,usb3-phy"; + reg = <0x0 0x5B160000 0x0 0x40000>; + #phy-cells = <0>; + u-boot,dm-pre-proper; +}; + +&usbotg3 { + phys = <&usbphynop1>; + u-boot,dm-pre-proper; +}; + &usdhc1 { u-boot,dm-pre-proper; }; diff --git a/arch/arm/dts/fsl-imx8qm-apalis.dts b/arch/arm/dts/fsl-imx8qm-apalis.dts index 0d8d3b3e8e..298e4b5907 100644 --- a/arch/arm/dts/fsl-imx8qm-apalis.dts +++ b/arch/arm/dts/fsl-imx8qm-apalis.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017-2019 Toradex + * Copyright 2017-2022 Toradex */ /dts-v1/; @@ -9,7 +9,6 @@ /memreserve/ 0x80000000 0x00020000; #include "fsl-imx8qm.dtsi" -#include "fsl-imx8qm-apalis-u-boot.dtsi" / { model = "Toradex Apalis iMX8"; @@ -19,6 +18,34 @@ bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200"; stdout-path = &lpuart1; }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usb_otg1_vbus: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + pinctrl-0 = <&pinctrl_gpio_usbo1_en>; + regulator-name = "usb_otg1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_usbh_en>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + /* Apalis USBH_EN */ + gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>; + }; + }; }; &iomuxc { @@ -30,8 +57,6 @@ <&pinctrl_gpio_keys>, <&pinctrl_gpio_pwm0>, <&pinctrl_gpio_pwm1>, <&pinctrl_gpio_pwm2>, <&pinctrl_gpio_pwm3>, <&pinctrl_gpio_pwm_bkl>, - <&pinctrl_gpio_usbh_en>, <&pinctrl_gpio_usbh_oc_n>, - <&pinctrl_gpio_usbo1_en>, <&pinctrl_gpio_usbo1_oc_n>, <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, @@ -587,10 +612,26 @@ status = "okay"; }; +&usbotg1 { + vbus-supply = <®_usb_otg1_vbus>; + srp-disable; + hnp-disable; + adp-disable; + disable-over-current; + status = "okay"; +}; + +&usbotg3 { + dr_mode = "host"; + vbus-supply = <®_usb_host_vbus>; +}; + /* eMMC */ &usdhc1 { - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1>; + pinctrl-2 = <&pinctrl_usdhc1>; bus-width = <8>; non-removable; status = "okay"; @@ -598,8 +639,10 @@ /* Apalis MMC1 */ &usdhc2 { - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; bus-width = <8>; cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ status = "okay"; diff --git a/arch/arm/dts/fsl-imx8qxp-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-apalis-u-boot.dtsi deleted file mode 100644 index e41911a04a..0000000000 --- a/arch/arm/dts/fsl-imx8qxp-apalis-u-boot.dtsi +++ /dev/null @@ -1,139 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright 2020 Toradex - */ - -&{/imx8qx-pm} { - - u-boot,dm-pre-proper; -}; - -&mu { - u-boot,dm-pre-proper; -}; - -&clk { - u-boot,dm-pre-proper; -}; - -&iomuxc { - u-boot,dm-pre-proper; -}; - -&pd_lsio { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio0 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio1 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio2 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio3 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio4 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio5 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio6 { - u-boot,dm-pre-proper; -}; - -&pd_lsio_gpio7 { - u-boot,dm-pre-proper; -}; - -&pd_dma { - u-boot,dm-pre-proper; -}; - -&pd_dma_lpuart0 { - u-boot,dm-pre-proper; -}; - -&pd_dma_lpuart3 { - u-boot,dm-pre-proper; -}; - -&pd_conn { - u-boot,dm-pre-proper; -}; - -&pd_conn_sdch0 { - u-boot,dm-pre-proper; -}; - -&pd_conn_sdch1 { - u-boot,dm-pre-proper; -}; - -&pd_conn_sdch2 { - u-boot,dm-pre-proper; -}; - -&pd_conn_enet0 { - u-boot,dm-pre-proper; -}; - -&gpio0 { - u-boot,dm-pre-proper; -}; - -&gpio1 { - u-boot,dm-pre-proper; -}; - -&gpio2 { - u-boot,dm-pre-proper; -}; - -&gpio3 { - u-boot,dm-pre-proper; -}; - -&gpio4 { - u-boot,dm-pre-proper; -}; - -&gpio5 { - u-boot,dm-pre-proper; -}; - -&gpio6 { - u-boot,dm-pre-proper; -}; - -&gpio7 { - u-boot,dm-pre-proper; -}; - -&lpuart3 { - u-boot,dm-pre-proper; -}; - -&lpuart0 { - u-boot,dm-pre-proper; -}; - -&usdhc1 { - u-boot,dm-pre-proper; - /delete-property/ assigned-clock-parents; -}; - -&usdhc2 { - u-boot,dm-pre-proper; - /delete-property/ assigned-clock-parents; -}; diff --git a/arch/arm/dts/fsl-imx8qxp-apalis.dts b/arch/arm/dts/fsl-imx8qxp-apalis.dts deleted file mode 100644 index 9cb3d3a809..0000000000 --- a/arch/arm/dts/fsl-imx8qxp-apalis.dts +++ /dev/null @@ -1,278 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright 2020 Toradex - */ - -/dts-v1/; - -#include "fsl-imx8qxp.dtsi" -#include "fsl-imx8qxp-apalis-u-boot.dtsi" - -/ { - model = "Toradex Apalis iMX8X"; - compatible = "toradex,apalis-imx8x", "fsl,imx8qxp"; - - chosen { - bootargs = "console=ttyLP1,115200"; - stdout-path = &lpuart1; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_otg1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_reset_moci>; - - apalis-imx8x { - /* Apalis UART1 */ - pinctrl_lpuart1: lpuart1grp { - fsl,pins = < - SC_P_UART1_RX_ADMA_UART1_RX 0x06000020 /* SODIMM 118 */ - SC_P_UART1_TX_ADMA_UART1_TX 0x06000020 /* SODIMM 112 */ - >; - }; - - /* On-module Gigabit Ethernet PHY Micrel KSZ9031 */ - pinctrl_fec1: fec1grp { - fsl,pins = < - SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x14a0 - SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x14a0 - SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 - SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 - SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 - SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x61 - SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 - SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 - SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x61 - SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x61 - SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x61 - SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 - SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 - SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 - SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x61 - SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x61 - /* On-module ETH_RESET# */ - SC_P_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x06000020 - /* On-module ETH_INT# */ - SC_P_ADC_IN2_LSIO_GPIO1_IO12 0x21 - >; - }; - - /* Apalis BKL_ON */ - pinctrl_gpio_bkl_on: gpio-bkl-on { - fsl,pins = < - SC_P_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 286 */ - >; - }; - - pinctrl_hog0: hog0grp { - fsl,pins = < - SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 - >; - }; - - pinctrl_hog1: hog1grp { - fsl,pins = < - /* Apalis USBO1_EN */ - SC_P_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x41 /* SODIMM 274 */ - >; - }; - - /* Apalis RESET_MOCI# */ - pinctrl_reset_moci: gpioresetmocigrp { - fsl,pins = < - SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x21 - >; - }; - - /* On-module eMMC */ - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins = < - SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins = < - SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x21 - SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 - SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 - SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 - SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 - SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 - SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 - SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 - SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 - SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 - >; - }; - - /* Apalis MMC1_CD# */ - pinctrl_usdhc2_gpio: mmc1gpiogrp { - fsl,pins = < - SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x06000021 /* SODIMM 164 */ - >; - }; - - pinctrl_usdhc2_gpio_sleep: usdhc1gpioslpgrp { - fsl,pins = < - SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x60 /* SODIMM 164 */ - >; - }; - - /* Apalis USBH_EN */ - pinctrl_usbh_en: usbhen { - fsl,pins = < - SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04 0x40 /* SODIMM 84 */ - >; - }; - - /* Apalis MMC1 */ - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 154 */ - SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2grp100mhz { - fsl,pins = < - SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 154 */ - SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_200mhz: usdhc2grp200mhz { - fsl,pins = < - SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 154 */ - SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - - pinctrl_usdhc2_sleep: usdhc2slpgrp { - fsl,pins = < - SC_P_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 154 */ - SC_P_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 150 */ - SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 160 */ - SC_P_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 162 */ - SC_P_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 144 */ - SC_P_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 146 */ - SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 - >; - }; - }; -}; - -/* Apalis Gigabit LAN */ -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; - fsl,magic-packet; - phy-handle = <ðphy0>; - phy-mode = "rgmii-id"; - phy-reset-duration = <10>; - phy-reset-post-delay = <150>; - phy-reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@4 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <4>; - }; - }; -}; - -/* Apalis UART1 */ -&lpuart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart1>; - status = "okay"; -}; - -/* On-module eMMC */ -&usdhc1 { - bus-width = <8>; - non-removable; - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - status = "okay"; -}; - -/* Apalis MMC1 */ -&usdhc2 { - bus-width = <4>; - cd-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; - pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; - pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; - disable-wp; - status = "okay"; -}; diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi index 322429a98a..84417d0ea6 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi @@ -3,6 +3,34 @@ * Copyright 2019 Toradex AG */ +/ { + aliases { + usbgadget0 = &usbg1; + usbhost1 = &usbh3; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + status = "okay"; + u-boot,dm-pre-proper; + }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + chipidea,usb = <&usbotg1>; + dr_mode = "peripheral"; + status = "okay"; + u-boot,dm-pre-proper; + }; + + usbh3: usbh3 { + compatible = "Cadence,usb3-host"; + cdns3,usb = <&usbotg3>; + dr_mode = "host"; + status = "okay"; + u-boot,dm-pre-proper; + }; +}; + &{/imx8qx-pm} { u-boot,dm-pre-proper; @@ -72,6 +100,22 @@ u-boot,dm-pre-proper; }; +&pd_conn_usbotg0 { + u-boot,dm-pre-proper; +}; + +&pd_conn_usbotg0_phy { + u-boot,dm-pre-proper; +}; + +&pd_conn_usb2 { + u-boot,dm-pre-proper; +}; + +&pd_conn_usb2_phy { + u-boot,dm-pre-proper; +}; + &pd_conn_sdch0 { u-boot,dm-pre-proper; }; @@ -84,6 +128,21 @@ u-boot,dm-pre-proper; }; +&gpio_expander_43 { + usb-bypass-n-hog { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + line-name = "usb-bypass-n"; + output-high; + }; + usb-reset-n-hog { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + line-name = "usb-reset-n"; + output-low; + }; +}; + &gpio0 { u-boot,dm-pre-proper; }; @@ -120,6 +179,30 @@ u-boot,dm-pre-proper; }; +&usbmisc1 { + u-boot,dm-pre-proper; +}; + +&usbphy1 { + u-boot,dm-pre-proper; +}; + +&usbotg1 { + u-boot,dm-pre-proper; +}; + +&usbotg3 { + phys = <&usbphynop1>; + u-boot,dm-pre-proper; +}; + +&usbphynop1 { + compatible = "cdns,usb3-phy"; + #phy-cells = <0>; + reg = <0x0 0x5B160000 0x0 0x40000>; + u-boot,dm-pre-proper; +}; + &usdhc1 { u-boot,dm-pre-proper; }; diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts index df992ac639..a672347e1a 100644 --- a/arch/arm/dts/fsl-imx8qxp-colibri.dts +++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts @@ -6,7 +6,6 @@ /dts-v1/; #include "fsl-imx8qxp.dtsi" -#include "fsl-imx8qxp-colibri-u-boot.dtsi" / { model = "Toradex Colibri iMX8X"; @@ -320,8 +319,6 @@ gpio-controller; #gpio-cells = <2>; reg = <0x43>; - initial_io_dir = <0xff>; - initial_output = <0x05>; }; }; @@ -353,3 +350,18 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; status = "okay"; }; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det>; + adp-disable; + hnp-disable; + srp-disable; + disable-over-current; + status = "okay"; +}; + +&usbotg3 { + vbus-supply = <®_usbh_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi index 976399ad60..311aa39d4c 100644 --- a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi @@ -6,6 +6,17 @@ #include "imx8mm-u-boot.dtsi" / { + aliases { + usbgadget0 = &usbg1; + }; + + usbg1: usbg1 { + compatible = "fsl,imx27-usb-gadget"; + dr_mode = "peripheral"; + chipidea,usb = <&usbotg1>; + status = "okay"; + }; + firmware { optee { compatible = "linaro,optee-tz"; @@ -28,6 +39,10 @@ u-boot,dm-spl; }; +&aips4 { + u-boot,dm-spl; +}; + &gpio1 { u-boot,dm-spl; }; @@ -46,12 +61,20 @@ &gpio5 { u-boot,dm-spl; + + ctrl_sleep_moci { + u-boot,dm-spl; + }; }; &i2c1 { u-boot,dm-spl; }; +&pinctrl_ctrl_sleep_moci { + u-boot,dm-spl; +}; + &pinctrl_i2c1 { u-boot,dm-spl; }; @@ -80,6 +103,18 @@ u-boot,dm-spl; }; +&usbmisc1 { + u-boot,dm-spl; +}; + +&usbotg1 { + u-boot,dm-spl; +}; + +&usbphynop1 { + u-boot,dm-spl; +}; + &usdhc1 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-verdin-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-u-boot.dtsi index a57ad45ed6..3f44af90e7 100644 --- a/arch/arm/dts/imx8mp-verdin-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-verdin-u-boot.dtsi @@ -3,6 +3,7 @@ * Copyright 2022 Toradex */ +#include "imx8mp-sec-def.h" #include "imx8mp-u-boot.dtsi" / { @@ -18,6 +19,50 @@ u-boot,dm-spl; wdt = <&wdog1>; }; + + mcu_rdc { + compatible = "imx8m,mcu_rdc"; + /* rdc config when MCU starts + * master + * SDMA3p --> domain 1 + * SDMA3b --> domain 1 + * SDMA3_SPBA2 --> domain 1 + * peripheral: + * SAI3 --> Only domain 1 can access + * UART4 --> Only domain 1 can access + * GPT1 --> Only domain 1 can access + * SDMA3 --> Only domain 1 can access + * I2C3 --> Only domain 1 can access + * memory: + * TCM --> Only domain 1 can access (0x7E0000~0x81FFFF) + * DDR --> Only domain 1 can access (0x80000000~0x81000000) + * end. + */ + start-config = < + RDC_MDA RDC_MDA_SDMA3p DID1 0x0 0x0 + RDC_MDA RDC_MDA_SDMA3b DID1 0x0 0x0 + RDC_MDA RDC_MDA_SDMA3_SPBA2 DID1 0x0 0x0 + RDC_PDAP RDC_PDAP_SAI3 PDAP_D1_ACCESS 0x0 0x0 + RDC_PDAP RDC_PDAP_UART4 PDAP_D1_ACCESS 0x0 0x0 + RDC_PDAP RDC_PDAP_GPT1 PDAP_D1_ACCESS 0x0 0x0 + RDC_PDAP RDC_PDAP_SDMA3 PDAP_D1_ACCESS 0x0 0x0 + RDC_PDAP RDC_PDAP_I2C3 PDAP_D1_ACCESS 0x0 0x0 + RDC_MEM_REGION 22 TCM_START TCM_END MEM_D1_ACCESS + RDC_MEM_REGION 39 M4_DDR_START M4_DDR_END MEM_D1_ACCESS + 0x0 0x0 0x0 0x0 0x0 + >; + /* rdc config when MCU stops + * memory: + * TCM --> domain 0/1 can access (0x7E0000~0x81FFFF) + * DDR --> domain 0/1 can access (0x80000000~0x81000000) + * end. + */ + stop-config = < + RDC_MEM_REGION 22 TCM_START TCM_END MEM_D0D1_ACCESS + RDC_MEM_REGION 39 M4_DDR_START M4_DDR_END MEM_D0D1_ACCESS + 0x0 0x0 0x0 0x0 0x0 + >; + }; }; &clk { @@ -29,6 +74,10 @@ }; +&crypto { + u-boot,dm-spl; +}; + &eqos { compatible = "fsl,imx-eqos"; /delete-property/ assigned-clocks; @@ -50,6 +99,10 @@ &gpio4 { u-boot,dm-spl; + + ctrl_sleep_moci { + u-boot,dm-spl; + }; }; &gpio5 { @@ -68,6 +121,10 @@ u-boot,dm-spl; }; +&pinctrl_ctrl_sleep_moci { + u-boot,dm-spl; +}; + &pinctrl_i2c1 { u-boot,dm-spl; }; @@ -105,10 +162,44 @@ u-boot,dm-spl; }; +&sec_jr0 { + u-boot,dm-spl; +}; + +&sec_jr1 { + u-boot,dm-spl; +}; + +&sec_jr2 { + u-boot,dm-spl; +}; + &uart3 { u-boot,dm-spl; }; +&usb3_0 { + /delete-property/ power-domains; +}; + +&usb3_1 { + /delete-property/ power-domains; +}; + +&usb_dwc3_0 { + compatible = "fsl,imx8mq-dwc3", "snps,dwc3"; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <400000000>; +}; + +&usb_dwc3_1 { + compatible = "fsl,imx8mq-dwc3", "snps,dwc3"; + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <400000000>; +}; + &usdhc2 { assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_400M>; assigned-clock-rates = <400000000>; diff --git a/arch/arm/dts/imx8mp-verdin.dts b/arch/arm/dts/imx8mp-verdin.dts index bc8bf4dad5..19ce3ee193 100644 --- a/arch/arm/dts/imx8mp-verdin.dts +++ b/arch/arm/dts/imx8mp-verdin.dts @@ -26,18 +26,6 @@ stdout-path = &uart3; }; - reg_usb1_host_vbus: regulator-usb1-vbus { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* USB_2_EN */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb1_vbus>; - regulator-always-on; - regulator-max-microvolt = <5000000>; - regulator-min-microvolt = <5000000>; - regulator-name = "usb1_host_vbus"; - }; - reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; enable-active-high; @@ -100,7 +88,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_eth>; }; +}; +&gpio4 { ctrl_sleep_moci { gpio-hog; /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */ @@ -305,7 +295,18 @@ status = "okay"; }; +/* Verdin USB_1 */ +&usb3_0 { + status = "okay"; +}; + &usb3_phy0 { + fsl,phy-tx-vref-tune = <0xe>; + fsl,phy-tx-preemp-amp-tune = <3>; + fsl,phy-tx-vboost-level = <5>; + fsl,phy-comp-dis-tune = <7>; + fsl,pcs-tx-deemph-3p5db = <0x21>; + fsl,phy-pcs-tx-swing-full = <0x7f>; status = "okay"; }; @@ -315,10 +316,18 @@ hnp-disable; srp-disable; usb-role-switch; + role-switch-default-mode = "none"; + status = "okay"; +}; + +/* Verdin USB_2 */ +&usb3_1 { status = "okay"; }; &usb3_phy1 { + fsl,phy-tx-preemp-amp-tune = <3>; + fsl,phy-tx-vref-tune = <0xb>; status = "okay"; }; @@ -532,12 +541,6 @@ >; }; - pinctrl_usb1_vbus: usb1grp { - fsl,pins = < - MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x19 - >; - }; - pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 9976ab78d0..3fe77a5e49 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -81,6 +81,14 @@ config IMX_HAB This option enables the support for secure boot (HAB). See doc/imx/habv4/* for more details. +config IMX_SPL_FIT_FDT_SIGNATURE + bool "Enable to verify signature of FIT FDT" + depends on IMX_HAB + depends on ARCH_IMX8M + help + Enable SPL to verify signature of FIT FDT during FIT loading. + This needs additional signing to FIT FDT part. + config CSF_SIZE hex "Maximum size for Command Sequence File (CSF) binary" depends on IMX_HAB @@ -282,6 +290,7 @@ config ANDROID_SUPPORT select SUPPORT_RAW_INITRD select LIBAVB select AVB_SUPPORT + imply IMX_SPL_FIT_FDT_SIGNATURE config ANDROID_AUTO_SUPPORT bool "Android Automotive features support" diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index df383fe9b9..7abcfeca86 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -78,11 +78,6 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP -config TARGET_APALIS_IMX8X - bool "Support Apalis iMX8X module" - select BOARD_LATE_INIT - select IMX8QXP - config TARGET_DENEB bool "Support i.MX8QXP Capricorn Deneb board" select BOARD_LATE_INIT @@ -208,7 +203,6 @@ source "board/freescale/imx8dxl_evk/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" source "board/toradex/apalis-imx8/Kconfig" source "board/toradex/colibri-imx8x/Kconfig" -source "board/toradex/apalis-imx8x/Kconfig" source "board/siemens/capricorn/Kconfig" config IMX_SNVS_SEC_SC diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 10fcada0cb..a94cd0df40 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -33,6 +33,10 @@ #include <asm/mach-imx/imx_vservice.h> #include <usb/ci_udc.h> +#ifndef CONFIG_SYS_MMC_ENV_DEV +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + DECLARE_GLOBAL_DATA_PTR; #define BT_PASSOVER_TAG 0x504F diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 0d2f7a5897..c2f6acdde7 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -747,7 +747,7 @@ bool is_usb_boot(void) { return get_boot_device() == USB_BOOT; } -#ifdef CONFIG_SERIAL_TAG +#if defined(CONFIG_SERIAL_TAG) || defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) void get_board_serial(struct tag_serialnr *serialnr) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -1285,6 +1285,48 @@ static int cleanup_nodes_for_efi(void *blob) return 0; } +static int fixup_thermal_trips(void *blob, const char *name) +{ + int minc, maxc; + int node, trip; + + node = fdt_path_offset(blob, "/thermal-zones"); + if (node < 0) + return node; + + node = fdt_subnode_offset(blob, node, name); + if (node < 0) + return node; + + node = fdt_subnode_offset(blob, node, "trips"); + if (node < 0) + return node; + + get_cpu_temp_grade(&minc, &maxc); + + fdt_for_each_subnode(trip, blob, node) { + const char *type; + int temp, ret; + + type = fdt_getprop(blob, trip, "type", NULL); + if (!type) + continue; + + temp = 0; + if (!strcmp(type, "critical")) + temp = 1000 * maxc; + else if (!strcmp(type, "passive")) + temp = 1000 * (maxc - 10); + if (temp) { + ret = fdt_setprop_u32(blob, trip, "temperature", temp); + if (ret) + return ret; + } + } + + return 0; +} + int ft_system_setup(void *blob, struct bd_info *bd) { #ifdef CONFIG_IMX8MQ @@ -1430,6 +1472,12 @@ usb_modify_speed: delete_u_boot_nodes(blob); + if (fixup_thermal_trips(blob, "cpu-thermal")) + printf("Failed to update cpu-thermal trip(s)"); + if (IS_ENABLED(CONFIG_IMX8MP) && + fixup_thermal_trips(blob, "soc-thermal")) + printf("Failed to update soc-thermal trip(s)"); + #if defined(CONFIG_ANDROID_SUPPORT) || defined(CONFIG_ANDROID_AUTO_SUPPORT) return 0; #else @@ -1713,6 +1761,16 @@ enum env_location env_get_location(enum env_operation op, int prio) return ENVL_UNKNOWN; switch (dev) { + case USB_BOOT: + if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) + return ENVL_SPI_FLASH; + if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND)) + return ENVL_NAND; + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) + return ENVL_MMC; + if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) + return ENVL_NOWHERE; + return ENVL_UNKNOWN; case QSPI_BOOT: if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) return ENVL_SPI_FLASH; diff --git a/arch/arm/mach-imx/mmc_env.c b/arch/arm/mach-imx/mmc_env.c index 7012ae9d7b..0c2987dece 100644 --- a/arch/arm/mach-imx/mmc_env.c +++ b/arch/arm/mach-imx/mmc_env.c @@ -10,6 +10,10 @@ #include <asm/mach-imx/boot_mode.h> #include <env.h> +#ifndef CONFIG_SYS_MMC_ENV_DEV +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + __weak int board_mmc_get_env_dev(int devno) { return devno; diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 919eb6180e..62888a4729 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -21,6 +21,8 @@ #include <g_dnl.h> #include <linux/libfdt.h> #include <mmc.h> +#include <image.h> +#include <asm/sections.h> DECLARE_GLOBAL_DATA_PTR; @@ -184,7 +186,7 @@ u32 spl_boot_device(void) #ifdef CONFIG_SPL_USB_GADGET int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) { - put_unaligned(0x0151, &dev->idProduct); + put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct); return 0; } @@ -314,7 +316,10 @@ ulong board_spl_fit_size_align(ulong size) */ size = ALIGN(size, 0x1000); - size += CONFIG_CSF_SIZE; + size += 2 * CONFIG_CSF_SIZE; + + if (size > CONFIG_SYS_BOOTM_LEN) + panic("spl: ERROR: image too big\n"); return size; } @@ -347,6 +352,41 @@ int dram_init_banksize(void) } #endif +#if IS_ENABLED(CONFIG_SPL_LOAD_FIT) +static int spl_verify_fit_hash(const void *fit) +{ + unsigned long size; + u8 value[SHA256_SUM_LEN]; + int value_len; + ulong fit_hash; + +#if CONFIG_IS_ENABLED(OF_CONTROL) + if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { + fit_hash = roundup((unsigned long)&_end + + fdt_totalsize(gd->fdt_blob), 4) + 0x18000; + } +#else + fit_hash = (unsigned long)&_end + 0x18000; +#endif + + size = fdt_totalsize(fit); + + if (calculate_hash(fit, size, "sha256", value, &value_len)) { + printf("Unsupported hash algorithm\n"); + return -1; + } + + if (value_len != SHA256_SUM_LEN) { + printf("Bad hash value len\n"); + return -1; + } else if (memcmp(value, (const void *)fit_hash, value_len) != 0) { + printf("Bad hash value\n"); + return -1; + } + + return 0; +} + /* * read the address where the IVT header must sit * from IVT image header, loaded from SPL into @@ -361,6 +401,30 @@ void *spl_load_simple_fit_fix_load(const void *fit) unsigned long size; u8 *tmp = (u8 *)fit; + if (IS_ENABLED(CONFIG_IMX_HAB)) { + if (IS_ENABLED(CONFIG_IMX_SPL_FIT_FDT_SIGNATURE)) { + u32 offset = ALIGN(fdt_totalsize(fit), 0x1000); + + if (imx_hab_authenticate_image((uintptr_t)fit, + offset + 2 * CSF_PAD_SIZE, + offset + CSF_PAD_SIZE)) { +#ifdef CONFIG_ANDROID_SUPPORT + printf("spl: ERROR: FIT FDT authentication unsuccessful\n"); + return NULL; +#else + panic("spl: ERROR: FIT FDT authentication unsuccessful\n"); +#endif + } + } else { + int ret = spl_verify_fit_hash(fit); + + if (ret && imx_hab_is_enabled()) + panic("spl: ERROR: FIT hash verify unsuccessful\n"); + + debug("spl_verify_fit_hash %d\n", ret); + } + } + offset = ALIGN(fdt_totalsize(fit), 0x1000); size = ALIGN(fdt_totalsize(fit), 4); size = board_spl_fit_size_align(size); @@ -379,6 +443,7 @@ void *spl_load_simple_fit_fix_load(const void *fit) return (void *)new; } +#endif #if defined(CONFIG_IMX8MP) || defined(CONFIG_IMX8MN) int board_handle_rdc_config(void *fdt_addr, const char *config_name, void *dst_addr) diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index d619f1e5d9..c0e8bed958 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -263,7 +263,7 @@ static u32 img_header_size(void) static int img_info_size(void *img_hdr) { #ifdef CONFIG_SPL_LOAD_FIT - return fit_get_size(img_hdr); + return board_spl_fit_size_align(fit_get_size(img_hdr)); #elif defined CONFIG_SPL_LOAD_IMX_CONTAINER struct container_hdr *container = img_hdr; diff --git a/board/toradex/apalis-imx8/Kconfig b/board/toradex/apalis-imx8/Kconfig index b43d6281b6..f16f9d2702 100644 --- a/board/toradex/apalis-imx8/Kconfig +++ b/board/toradex/apalis-imx8/Kconfig @@ -12,6 +12,9 @@ config SYS_CONFIG_NAME config TDX_CFG_BLOCK default y +config TDX_CFG_BLOCK_2ND_ETHADDR + default y + config TDX_HAVE_MMC default y diff --git a/board/toradex/apalis-imx8/Makefile b/board/toradex/apalis-imx8/Makefile index a8c3eb7240..fe19cfdf69 100644 --- a/board/toradex/apalis-imx8/Makefile +++ b/board/toradex/apalis-imx8/Makefile @@ -1,6 +1,6 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0-or-later # -# Copyright 2019 Toradex +# Copyright 2019-2022 Toradex # obj-y += apalis-imx8.o diff --git a/board/toradex/apalis-imx8/apalis-imx8-imximage.cfg b/board/toradex/apalis-imx8/apalis-imx8-imximage.cfg index 16183f9667..fc4aa74990 100644 --- a/board/toradex/apalis-imx8/apalis-imx8-imximage.cfg +++ b/board/toradex/apalis-imx8/apalis-imx8-imximage.cfg @@ -1,6 +1,6 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * Copyright 2019 Toradex + * Copyright 2019-2022 Toradex * * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure * and create imx8image boot image diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 04877fcd94..051149bd05 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0-or-later /* - * Copyright 2019 Toradex + * Copyright 2019-2022 Toradex */ #include <common.h> @@ -12,11 +12,15 @@ #include <asm/arch/imx8-pins.h> #include <asm/arch/iomux.h> #include <asm/arch/sci/sci.h> +#include <asm/arch/snvs_security_sc.h> #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/io.h> +#include <command.h> #include <env.h> #include <errno.h> +#include <linux/bitops.h> +#include <linux/delay.h> #include <linux/libfdt.h> #include "../common/tdx-cfg-block.h" @@ -28,22 +32,105 @@ DECLARE_GLOBAL_DATA_PTR; (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) +#define PCB_VERS_DETECT ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define PCB_VERS_DEFAULT ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT)) + +#define TDX_USER_FUSE_BLOCK1_A 276 +#define TDX_USER_FUSE_BLOCK1_B 277 +#define TDX_USER_FUSE_BLOCK2_A 278 +#define TDX_USER_FUSE_BLOCK2_B 279 + +enum pcb_rev_t { + PCB_VERSION_1_0, + PCB_VERSION_1_1 +}; + +static iomux_cfg_t pcb_vers_detect[] = { + SC_P_MIPI_DSI0_GPIO0_00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT), + SC_P_MIPI_DSI0_GPIO0_01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT), +}; + +static iomux_cfg_t pcb_vers_default[] = { + SC_P_MIPI_DSI0_GPIO0_00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DEFAULT), + SC_P_MIPI_DSI0_GPIO0_01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DEFAULT), +}; + static iomux_cfg_t uart1_pads[] = { SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), }; +struct tdx_user_fuses { + u16 pid4; + u16 vers; + u8 ramid; +}; + static void setup_iomux_uart(void) { imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } +static uint32_t do_get_tdx_user_fuse(int a, int b) +{ + sc_err_t sciErr; + u32 val_a = 0; + u32 val_b = 0; + + sciErr = sc_misc_otp_fuse_read(-1, a, &val_a); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", a); + return 0; + } + + sciErr = sc_misc_otp_fuse_read(-1, b, &val_b); + if (sciErr != SC_ERR_NONE) { + printf("Error reading out user fuse %d\n", b); + return 0; + } + + return ((val_a & 0xffff) << 16) | (val_b & 0xffff); +} + +static void get_tdx_user_fuse(struct tdx_user_fuses *tdxuserfuse) +{ + u32 fuse_block; + + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A, + TDX_USER_FUSE_BLOCK2_B); + + /* + * Fuse block 2 acts as a backup area, if this reads 0 we want to + * use fuse block 1 + */ + if (fuse_block == 0) + fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A, + TDX_USER_FUSE_BLOCK1_B); + + tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0); + tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0); + tdxuserfuse->ramid = fuse_block & GENMASK(3, 0); +} + void board_mem_get_layout(u64 *phys_sdram_1_start, u64 *phys_sdram_1_size, u64 *phys_sdram_2_start, u64 *phys_sdram_2_size) { u32 is_quadplus = 0, val = 0; + struct tdx_user_fuses tdxramfuses; sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); if (scierr == SC_ERR_NONE) { @@ -51,25 +138,44 @@ void board_mem_get_layout(u64 *phys_sdram_1_start, is_quadplus = ((val >> 4) & 0x3) != 0x0; } + get_tdx_user_fuse(&tdxramfuses); + *phys_sdram_1_start = PHYS_SDRAM_1; *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; *phys_sdram_2_start = PHYS_SDRAM_2; - if (is_quadplus) - /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + + switch (tdxramfuses.ramid) { + case 1: + *phys_sdram_2_size = SZ_2G; + break; + case 2: *phys_sdram_2_size = 0x0UL; - else - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + case 3: + *phys_sdram_2_size = SZ_2G; + break; + case 4: + *phys_sdram_2_size = SZ_4G + SZ_2G; + break; + default: + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; + break; + } } int board_early_init_f(void) { sc_pm_clock_rate_t rate = SC_80MHZ; - sc_err_t err = 0; + int ret; /* Set UART1 clock root to 80 MHz and enable it */ - err = sc_pm_setup_uart(SC_R_UART_1, rate); - if (err != SC_ERR_NONE) - return 0; + ret = sc_pm_setup_uart(SC_R_UART_1, rate); + if (ret) + return ret; setup_iomux_uart(); @@ -77,25 +183,30 @@ int board_early_init_f(void) } #if CONFIG_IS_ENABLED(DM_GPIO) + +#define BKL1_GPIO IMX_GPIO_NR(1, 10) + +static iomux_cfg_t board_gpios[] = { + SC_P_LVDS1_GPIO00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + static void board_gpio_init(void) { - /* TODO */ + imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios)); + + gpio_request(BKL1_GPIO, "BKL1_GPIO"); } #else static inline void board_gpio_init(void) {} #endif -#if IS_ENABLED(CONFIG_FEC_MXC) -#include <miiphy.h> - -int board_phy_config(struct phy_device *phydev) +/* + * Backlight off before OS handover + */ +void board_preboot_os(void) { - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; + gpio_direction_output(BKL1_GPIO, 0); } -#endif int checkboard(void) { @@ -107,10 +218,86 @@ int checkboard(void) return 0; } +static enum pcb_rev_t get_pcb_revision(void) +{ + unsigned int pcb_vers = 0; + + imx8_iomux_setup_multiple_pads(pcb_vers_detect, + ARRAY_SIZE(pcb_vers_detect)); + + gpio_request(IMX_GPIO_NR(1, 18), + "PCB version detection on PAD SC_P_MIPI_DSI0_GPIO0_00"); + gpio_request(IMX_GPIO_NR(1, 19), + "PCB version detection on PAD SC_P_MIPI_DSI0_GPIO0_01"); + gpio_direction_input(IMX_GPIO_NR(1, 18)); + gpio_direction_input(IMX_GPIO_NR(1, 19)); + + udelay(1000); + + pcb_vers = gpio_get_value(IMX_GPIO_NR(1, 18)); + pcb_vers |= gpio_get_value(IMX_GPIO_NR(1, 19)) << 1; + + /* Set muxing back to default values for saving energy */ + imx8_iomux_setup_multiple_pads(pcb_vers_default, + ARRAY_SIZE(pcb_vers_default)); + + switch (pcb_vers) { + case 0b11: + return PCB_VERSION_1_0; + case 0b10: + return PCB_VERSION_1_1; + default: + printf("Unknown PCB version=0x%x, default to V1.1\n", pcb_vers); + return PCB_VERSION_1_1; + } +} + +static void select_dt_from_module_version(void) +{ + env_set("soc", "imx8qm"); + env_set("variant", "-v1.1"); + + switch (tdx_hw_tag.prodid) { + /* Select Apalis iMX8QM device trees */ + case APALIS_IMX8QM_IT: + case APALIS_IMX8QM_WIFI_BT_IT: + case APALIS_IMX8QM_8GB_WIFI_BT_IT: + if (get_pcb_revision() == PCB_VERSION_1_0) + env_set("variant", ""); + break; + /* Select Apalis iMX8QP device trees */ + case APALIS_IMX8QP_WIFI_BT: + case APALIS_IMX8QP: + env_set("soc", "imx8qp"); + break; + default: + printf("Unknown Apalis iMX8 module\n"); + return; + } +} + +static int do_select_dt_from_module_version(struct cmd_tbl *cmdtp, int flag, + int argc, char * const argv[]) +{ + select_dt_from_module_version(); + return 0; +} + +U_BOOT_CMD(select_dt_from_module_version, CONFIG_SYS_MAXARGS, 1, do_select_dt_from_module_version, + "\n", " - select devicetree from module version" +); + int board_init(void) { board_gpio_init(); + if (IS_ENABLED(CONFIG_IMX_SNVS_SEC_SC_AUTO)) { + int ret = snvs_security_sc_init(); + + if (ret) + return ret; + } + return 0; } @@ -119,7 +306,10 @@ int board_init(void) */ void reset_cpu(void) { - /* TODO */ + sc_pm_reboot(-1, SC_PM_RESET_TYPE_COLD); + + do { + } while (1); } #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) @@ -142,5 +332,9 @@ int board_late_init(void) env_set("board_rev", "v1.0"); #endif + build_info(); + + select_dt_from_module_version(); + return 0; } diff --git a/board/toradex/apalis-imx8x/Kconfig b/board/toradex/apalis-imx8x/Kconfig deleted file mode 100644 index d6cda7e3ff..0000000000 --- a/board/toradex/apalis-imx8x/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -if TARGET_APALIS_IMX8X - -config SYS_BOARD - default "apalis-imx8x" - -config SYS_VENDOR - default "toradex" - -config SYS_CONFIG_NAME - default "apalis-imx8x" - -config TDX_CFG_BLOCK - default y - -config TDX_HAVE_MMC - default y - -config TDX_CFG_BLOCK_DEV - default "0" - -config TDX_CFG_BLOCK_PART - default "1" - -# Toradex config block in eMMC, at the end of 1st "boot sector" -config TDX_CFG_BLOCK_OFFSET - default "-512" - -config IMX_CONFIG - default "board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg" - -source "board/toradex/common/Kconfig" - -endif diff --git a/board/toradex/apalis-imx8x/MAINTAINERS b/board/toradex/apalis-imx8x/MAINTAINERS deleted file mode 100644 index 93d6cdd474..0000000000 --- a/board/toradex/apalis-imx8x/MAINTAINERS +++ /dev/null @@ -1,10 +0,0 @@ -Apalis iMX8X -M: Marcel Ziswiler <marcel.ziswiler@toradex.com> -W: http://developer.toradex.com/software/linux/linux-software -S: Maintained -F: arch/arm/dts/fsl-imx8x-apalis.dts -F: arch/arm/dts/fsl-imx8x-apalis-u-boot.dtsi -F: board/toradex/apalis-imx8x/ -F: configs/apalis-imx8x_defconfig -F: doc/board/toradex/apalis-imx8x.rst -F: include/configs/apalis-imx8x.h diff --git a/board/toradex/apalis-imx8x/Makefile b/board/toradex/apalis-imx8x/Makefile deleted file mode 100644 index 9d6e85b742..0000000000 --- a/board/toradex/apalis-imx8x/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright 2020 Toradex -# - -obj-y += apalis-imx8x.o diff --git a/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg b/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg deleted file mode 100644 index c229706f80..0000000000 --- a/board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2020 Toradex - * - * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure - * and create imx8image boot image - */ - - -/* Boot from SD, sector size 0x400 */ -BOOT_FROM EMMC_FASTBOOT 0x400 -/* SoC type IMX8QX */ -SOC_TYPE IMX8QX -/* Append seco container image */ -APPEND mx8qx-ahab-container.img -/* Create the 2nd container */ -CONTAINER -/* Add scfw image with exec attribute */ -IMAGE SCU mx8qx-apalis-scfw-tcm.bin -/* Add ATF image with exec attribute */ -IMAGE A35 bl31.bin 0x80000000 -/* Add U-Boot image with load attribute */ -DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/toradex/apalis-imx8x/apalis-imx8x.c b/board/toradex/apalis-imx8x/apalis-imx8x.c deleted file mode 100644 index ac3bac66a9..0000000000 --- a/board/toradex/apalis-imx8x/apalis-imx8x.c +++ /dev/null @@ -1,155 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2020 Toradex - */ - -#include <common.h> -#include <cpu_func.h> -#include <init.h> - -#include <asm/arch/clock.h> -#include <asm/arch/imx8-pins.h> -#include <asm/arch/iomux.h> -#include <asm/arch/sci/sci.h> -#include <asm/arch/sys_proto.h> -#include <asm/global_data.h> -#include <asm/gpio.h> -#include <asm/io.h> -#include <env.h> -#include <errno.h> -#include <linux/libfdt.h> - -#include "../common/tdx-cfg-block.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ - (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ - (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ - (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) - -static iomux_cfg_t uart1_pads[] = { - SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -static void setup_iomux_uart(void) -{ - imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); -} - -void board_mem_get_layout(u64 *phys_sdram_1_start, - u64 *phys_sdram_1_size, - u64 *phys_sdram_2_start, - u64 *phys_sdram_2_size) -{ - u32 is_dualx = 0, val = 0; - sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); - - if (scierr == SC_ERR_NONE) { - /* DX has two A35 cores disabled */ - is_dualx = (val & 0xf) != 0x0; - } - - *phys_sdram_1_start = PHYS_SDRAM_1; - if (is_dualx) - /* Our DX based SKUs only have 1 GB RAM */ - *phys_sdram_1_size = SZ_1G; - else - *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; - *phys_sdram_2_start = PHYS_SDRAM_2; - *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; -} - -int board_early_init_f(void) -{ - sc_pm_clock_rate_t rate; - sc_err_t err = 0; - - /* - * This works around that having only UART3 up the baudrate is 1.2M - * instead of 115.2k. Set UART0 clock root to 80 MHz - */ - rate = 80000000; - err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate); - if (err != SC_ERR_NONE) - return 0; - - /* Set UART3 clock root to 80 MHz and enable it */ - rate = SC_80MHZ; - err = sc_pm_setup_uart(SC_R_UART_1, rate); - if (err != SC_ERR_NONE) - return 0; - - setup_iomux_uart(); - - return 0; -} - -#if IS_ENABLED(CONFIG_DM_GPIO) -static void board_gpio_init(void) -{ - /* TODO */ -} -#else -static inline void board_gpio_init(void) {} -#endif - -#if IS_ENABLED(CONFIG_FEC_MXC) -#include <miiphy.h> - -int board_phy_config(struct phy_device *phydev) -{ - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} -#endif - -int checkboard(void) -{ - puts("Model: Toradex Apalis iMX8X\n"); - - build_info(); - print_bootinfo(); - - return 0; -} - -int board_init(void) -{ - board_gpio_init(); - - return 0; -} - -/* - * Board specific reset that is system reset. - */ -void reset_cpu(void) -{ - /* TODO */ -} - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return ft_common_board_setup(blob, bd); -} -#endif - -int board_mmc_get_env_dev(int devno) -{ - return devno; -} - -int board_late_init(void) -{ -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -/* TODO move to common */ - env_set("board_name", "Apalis iMX8X"); -#endif - - return 0; -} diff --git a/board/toradex/colibri-imx8x/Kconfig b/board/toradex/colibri-imx8x/Kconfig index b89840a379..cb11e2c318 100644 --- a/board/toradex/colibri-imx8x/Kconfig +++ b/board/toradex/colibri-imx8x/Kconfig @@ -12,6 +12,9 @@ config SYS_CONFIG_NAME config TDX_CFG_BLOCK default y +config TDX_CFG_BLOCK_2ND_ETHADDR + default y + config TDX_HAVE_MMC default y diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c index 169d4d04b1..36bc85fdf0 100644 --- a/board/toradex/colibri-imx8x/colibri-imx8x.c +++ b/board/toradex/colibri-imx8x/colibri-imx8x.c @@ -12,17 +12,21 @@ #include <asm/arch/imx8-pins.h> #include <asm/arch/iomux.h> #include <asm/arch/sci/sci.h> +#include <asm/arch/snvs_security_sc.h> #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/io.h> #include <env.h> #include <errno.h> #include <linux/libfdt.h> +#include <usb.h> #include "../common/tdx-cfg-block.h" DECLARE_GLOBAL_DATA_PTR; +static struct gpio_desc gpio_usb_cdet; + #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ @@ -40,21 +44,44 @@ static void setup_iomux_uart(void) imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); } -void board_mem_get_layout(u64 *phys_sdram_1_start, - u64 *phys_sdram_1_size, - u64 *phys_sdram_2_start, - u64 *phys_sdram_2_size) +int board_ci_udc_phy_mode(void *__iomem phy_base, int phy_off) { - u32 is_dualx = 0, val = 0; - sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val); + int ret; - if (scierr == SC_ERR_NONE) { + switch ((phys_addr_t)phy_base) { + case USB_BASE_ADDR: + if (!dm_gpio_is_valid(&gpio_usb_cdet)) + return -ENODEV; + + ret = dm_gpio_get_value(&gpio_usb_cdet); + if (ret < 0) + return ret; + + return ret ? USB_INIT_DEVICE : USB_INIT_HOST; + default: + return USB_INIT_HOST; + } +} + +static int is_imx8dx(void) +{ + u32 val = 0; + sc_err_t sc_err = sc_misc_otp_fuse_read(-1, 6, &val); + + if (sc_err == SC_ERR_NONE) { /* DX has two A35 cores disabled */ - is_dualx = (val & 0xf) != 0x0; + return (val & 0xf) != 0x0; } + return false; +} +void board_mem_get_layout(u64 *phys_sdram_1_start, + u64 *phys_sdram_1_size, + u64 *phys_sdram_2_start, + u64 *phys_sdram_2_size) +{ *phys_sdram_1_start = PHYS_SDRAM_1; - if (is_dualx) + if (is_imx8dx()) /* Our DX based SKUs only have 1 GB RAM */ *phys_sdram_1_size = SZ_1G; else @@ -91,7 +118,14 @@ int board_early_init_f(void) #if IS_ENABLED(CONFIG_DM_GPIO) static void board_gpio_init(void) { - /* TODO */ + if (dm_gpio_lookup_name("GPIO5_9", &gpio_usb_cdet)) + return; + + if (dm_gpio_request(&gpio_usb_cdet, "usb_c_det")) + return; + + if (dm_gpio_set_dir_flags(&gpio_usb_cdet, GPIOD_IS_IN)) + return; } #else static inline void board_gpio_init(void) {} @@ -119,10 +153,29 @@ int checkboard(void) return 0; } +static void select_dt_from_module_version(void) +{ + /* + * The dtb filename is constructed from ${soc}-colibri-${fdt_board}.dtb. + * Set soc depending on the used SoC. + */ + if (is_imx8dx()) + env_set("soc", "imx8dx"); + else + env_set("soc", "imx8qxp"); +} + int board_init(void) { board_gpio_init(); + if (IS_ENABLED(CONFIG_IMX_SNVS_SEC_SC_AUTO)) { + int ret = snvs_security_sc_init(); + + if (ret) + return ret; + } + return 0; } @@ -154,5 +207,9 @@ int board_late_init(void) env_set("board_rev", "v1.0"); #endif + build_info(); + + select_dt_from_module_version(); + return 0; } diff --git a/board/toradex/colibri_pxa270/Kconfig b/board/toradex/colibri_pxa270/Kconfig deleted file mode 100644 index f646baa3f0..0000000000 --- a/board/toradex/colibri_pxa270/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ -if TARGET_COLIBRI_PXA270 - -config SYS_BOARD - default "colibri_pxa270" - -config SYS_VENDOR - default "toradex" - -config SYS_CONFIG_NAME - default "colibri_pxa270" - -config TDX_CFG_BLOCK - default y - -config TDX_HAVE_NOR - default y - -config TDX_CFG_BLOCK_OFFSET - default "262144" - -source "board/toradex/common/Kconfig" - -endif diff --git a/board/toradex/colibri_pxa270/MAINTAINERS b/board/toradex/colibri_pxa270/MAINTAINERS deleted file mode 100644 index b378d7be5a..0000000000 --- a/board/toradex/colibri_pxa270/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -COLIBRI_PXA270 BOARD -M: Marek Vasut <marek.vasut@gmail.com> -S: Maintained -F: board/toradex/colibri_pxa270/ -F: include/configs/colibri_pxa270.h -F: configs/colibri_pxa270_defconfig diff --git a/board/toradex/colibri_pxa270/Makefile b/board/toradex/colibri_pxa270/Makefile deleted file mode 100644 index ea610cfea9..0000000000 --- a/board/toradex/colibri_pxa270/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Toradex Colibri PXA270 Support -# -# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - -obj-y := colibri_pxa270.o diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c deleted file mode 100644 index 25fbf41209..0000000000 --- a/board/toradex/colibri_pxa270/colibri_pxa270.c +++ /dev/null @@ -1,153 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Toradex Colibri PXA270 Support - * - * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - * Copyright (C) 2016-2019 Marcel Ziswiler <marcel.ziswiler@toradex.com> - */ - -#include <common.h> -#include <cpu_func.h> -#include <dm.h> -#include <init.h> -#include <net.h> -#include <asm/arch/hardware.h> -#include <asm/arch/pxa.h> -#include <asm/arch/regs-mmc.h> -#include <asm/arch/regs-uart.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <dm/platdata.h> -#include <dm/platform_data/pxa_mmc_gen.h> -#include <dm/platform_data/serial_pxa.h> -#include <netdev.h> -#include <serial.h> -#include <usb.h> -#include <asm/mach-types.h> -#include <linux/delay.h> -#include "../common/tdx-common.h" - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - /* We have RAM, disable cache */ - dcache_disable(); - icache_disable(); - - /* arch number of Toradex Colibri PXA270 */ - gd->bd->bi_arch_number = MACH_TYPE_COLIBRI; - - /* address of boot parameters */ - gd->bd->bi_boot_params = 0xa0000100; - - return 0; -} - -int checkboard(void) -{ - puts("Model: Toradex Colibri PXA270\n"); - - return 0; -} - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return ft_common_board_setup(blob, bd); -} -#endif - -int dram_init(void) -{ - pxa2xx_dram_init(); - gd->ram_size = PHYS_SDRAM_1_SIZE; - return 0; -} - -#ifdef CONFIG_CMD_USB -int board_usb_init(int index, enum usb_init_type init) -{ - writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) & - ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE), - UHCHR); - - writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR); - - while (UHCHR & UHCHR_FSBIR) - ; - - writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR); - writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE); - - /* Clear any OTG Pin Hold */ - if (readl(PSSR) & PSSR_OTGPH) - writel(readl(PSSR) | PSSR_OTGPH, PSSR); - - writel(readl(UHCRHDA) & ~(0x200), UHCRHDA); - writel(readl(UHCRHDA) | 0x100, UHCRHDA); - - /* Set port power control mask bits, only 3 ports. */ - writel(readl(UHCRHDB) | (0x7 << 17), UHCRHDB); - - /* enable port 2 */ - writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS | - UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR); - - return 0; -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} - -void usb_board_stop(void) -{ - writel(readl(UHCHR) | UHCHR_FHR, UHCHR); - udelay(11); - writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); - - writel(readl(UHCCOMS) | 1, UHCCOMS); - udelay(10); - - writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN); -} -#endif - -#ifdef CONFIG_DRIVER_DM9000 -int board_eth_init(struct bd_info *bis) -{ - return dm9000_initialize(bis); -} -#endif - -#ifdef CONFIG_CMD_MMC -#if !CONFIG_IS_ENABLED(DM_MMC) -int board_mmc_init(struct bd_info *bis) -{ - pxa_mmc_register(0); - return 0; -} -#else /* !CONFIG_IS_ENABLED(DM_MMC) */ -static const struct pxa_mmc_plat mmc_plat = { - .base = (struct pxa_mmc_regs *)MMC0_BASE, -}; - -U_BOOT_DRVINFO(pxa_mmcs) = { - .name = "pxa_mmc", - .plat = &mmc_plat, -}; -#endif /* !CONFIG_IS_ENABLED(DM_MMC) */ -#endif - -static const struct pxa_serial_plat serial_plat = { - .base = (struct pxa_uart_regs *)FFUART_BASE, - .port = FFUART_INDEX, - .baudrate = CONFIG_BAUDRATE, -}; - -U_BOOT_DRVINFO(pxa_serials) = { - .name = "serial_pxa", - .plat = &serial_plat, -}; diff --git a/board/toradex/common/Makefile b/board/toradex/common/Makefile index 7b19b6e4c8..eca8f71266 100644 --- a/board/toradex/common/Makefile +++ b/board/toradex/common/Makefile @@ -7,6 +7,7 @@ ifeq ($(CONFIG_SPL_BUILD),y) obj- := __dummy__.o else obj-$(CONFIG_TDX_CFG_BLOCK) += tdx-cfg-block.o +obj-y += mmc.o obj-y += tdx-common.o obj-y += tdx-eeprom.o endif diff --git a/board/toradex/common/mmc.c b/board/toradex/common/mmc.c new file mode 100644 index 0000000000..5fe8026ed1 --- /dev/null +++ b/board/toradex/common/mmc.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016-2019 Toradex, Inc. + */ + +#include <common.h> +#include <mmc.h> + +/* provide a default implementation */ +__weak int mmc_map_to_kernel_blk(int dev_no) +{ + return dev_no; +} diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index 7cadd05c0a..0e6d866ad7 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -11,23 +11,6 @@ #include <command.h> #include <asm/cache.h> -#if defined(CONFIG_TARGET_APALIS_IMX6) || \ - defined(CONFIG_TARGET_APALIS_IMX8) || \ - defined(CONFIG_TARGET_APALIS_IMX8X) || \ - defined(CONFIG_TARGET_COLIBRI_IMX6) || \ - defined(CONFIG_TARGET_COLIBRI_IMX8X) || \ - defined(CONFIG_TARGET_VERDIN_IMX8MM) || \ - defined(CONFIG_TARGET_VERDIN_IMX8MN) || \ - defined(CONFIG_TARGET_VERDIN_IMX8MP) -#include <asm/arch/sys_proto.h> -#else -#define is_cpu_type(cpu) (0) -#endif -#if defined(CONFIG_CPU_PXA27X) -#include <asm/arch-pxa/pxa.h> -#else -#define cpu_is_pxa27x(cpu) (0) -#endif #include <cli.h> #include <console.h> #include <env.h> @@ -82,88 +65,164 @@ bool valid_cfgblock_carrier; struct toradex_hw tdx_car_hw_tag; #endif -const char * const toradex_modules[] = { - [0] = "UNKNOWN MODULE", - [1] = "Colibri PXA270 312MHz", - [2] = "Colibri PXA270 520MHz", - [3] = "Colibri PXA320 806MHz", - [4] = "Colibri PXA300 208MHz", - [5] = "Colibri PXA310 624MHz", - [6] = "Colibri PXA320 806MHz IT", - [7] = "Colibri PXA300 208MHz XT", - [8] = "Colibri PXA270 312MHz", - [9] = "Colibri PXA270 520MHz", - [10] = "Colibri VF50 128MB", /* not currently on sale */ - [11] = "Colibri VF61 256MB", - [12] = "Colibri VF61 256MB IT", - [13] = "Colibri VF50 128MB IT", - [14] = "Colibri iMX6 Solo 256MB", - [15] = "Colibri iMX6 DualLite 512MB", - [16] = "Colibri iMX6 Solo 256MB IT", - [17] = "Colibri iMX6 DualLite 512MB IT", - [18] = "UNKNOWN MODULE", - [19] = "UNKNOWN MODULE", - [20] = "Colibri T20 256MB", - [21] = "Colibri T20 512MB", - [22] = "Colibri T20 512MB IT", - [23] = "Colibri T30 1GB", - [24] = "Colibri T20 256MB IT", - [25] = "Apalis T30 2GB", - [26] = "Apalis T30 1GB", - [27] = "Apalis iMX6 Quad 1GB", - [28] = "Apalis iMX6 Quad 2GB IT", - [29] = "Apalis iMX6 Dual 512MB", - [30] = "Colibri T30 1GB IT", - [31] = "Apalis T30 1GB IT", - [32] = "Colibri iMX7 Solo 256MB", - [33] = "Colibri iMX7 Dual 512MB", - [34] = "Apalis TK1 2GB", - [35] = "Apalis iMX6 Dual 1GB IT", - [36] = "Colibri iMX6ULL 256MB", - [37] = "Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT", - [38] = "Colibri iMX8 QuadXPlus 2GB Wi-Fi / BT IT", - [39] = "Colibri iMX7 Dual 1GB (eMMC)", - [40] = "Colibri iMX6ULL 512MB Wi-Fi / BT IT", - [41] = "Colibri iMX7 Dual 512MB EPDC", - [42] = "Apalis TK1 4GB", - [43] = "Colibri T20 512MB IT SETEK", - [44] = "Colibri iMX6ULL 512MB IT", - [45] = "Colibri iMX6ULL 512MB Wi-Fi / Bluetooth", - [46] = "Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT", - [47] = "Apalis iMX8 QuadMax 4GB IT", - [48] = "Apalis iMX8 QuadPlus 2GB Wi-Fi / BT", - [49] = "Apalis iMX8 QuadPlus 2GB", - [50] = "Colibri iMX8 QuadXPlus 2GB IT", - [51] = "Colibri iMX8 DualX 1GB Wi-Fi / Bluetooth", - [52] = "Colibri iMX8 DualX 1GB", - [53] = "Apalis iMX8 QuadXPlus 2GB ECC IT", - [54] = "Apalis iMX8 DualXPlus 1GB", - [55] = "Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT", - [56] = "Verdin iMX8M Nano Quad 1GB Wi-Fi / BT", /* not currently on sale */ - [57] = "Verdin iMX8M Mini DualLite 1GB", - [58] = "Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT", - [59] = "Verdin iMX8M Mini Quad 2GB IT", - [60] = "Verdin iMX8M Mini DualLite 1GB WB IT", - [61] = "Verdin iMX8M Plus Quad 2GB", - [62] = "Colibri iMX6ULL 1GB IT (eMMC)", - [63] = "Verdin iMX8M Plus Quad 4GB IT", - [64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT", - [65] = "Verdin iMX8M Plus QuadLite 1GB IT", - [66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT", +#define TARGET_IS_ENABLED(x) IS_ENABLED(CONFIG_TARGET_ ## x) + +const struct toradex_som toradex_modules[] = { + [0] = { "UNKNOWN MODULE", 0 }, + [1] = { "Colibri PXA270 312MHz", 0 }, + [2] = { "Colibri PXA270 520MHz", 0 }, + [3] = { "Colibri PXA320 806MHz", 0 }, + [4] = { "Colibri PXA300 208MHz", 0 }, + [5] = { "Colibri PXA310 624MHz", 0 }, + [6] = { "Colibri PXA320IT 806MHz", 0 }, + [7] = { "Colibri PXA300 208MHz XT", 0 }, + [8] = { "Colibri PXA270 312MHz", 0 }, + [9] = { "Colibri PXA270 520MHz", 0 }, + [10] = { "Colibri VF50 128MB", TARGET_IS_ENABLED(COLIBRI_VF) }, + [11] = { "Colibri VF61 256MB", TARGET_IS_ENABLED(COLIBRI_VF) }, + [12] = { "Colibri VF61 256MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, + [13] = { "Colibri VF50 128MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, + [14] = { "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + [15] = { "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + [16] = { "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + [17] = { "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + [18] = { "UNKNOWN MODULE", 0 }, + [19] = { "UNKNOWN MODULE", 0 }, + [20] = { "Colibri T20 256MB", TARGET_IS_ENABLED(COLIBRI_T20) }, + [21] = { "Colibri T20 512MB", TARGET_IS_ENABLED(COLIBRI_T20) }, + [22] = { "Colibri T20 512MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, + [23] = { "Colibri T30 1GB", TARGET_IS_ENABLED(COLIBRI_T30) }, + [24] = { "Colibri T20 256MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, + [25] = { "Apalis T30 2GB", TARGET_IS_ENABLED(APALIS_T30) }, + [26] = { "Apalis T30 1GB", TARGET_IS_ENABLED(APALIS_T30) }, + [27] = { "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, + [28] = { "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, + [29] = { "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, + [30] = { "Colibri T30 1GB IT", TARGET_IS_ENABLED(COLIBRI_T30) }, + [31] = { "Apalis T30 1GB IT", TARGET_IS_ENABLED(APALIS_T30) }, + [32] = { "Colibri iMX7S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + [33] = { "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + [34] = { "Apalis TK1 2GB", TARGET_IS_ENABLED(APALIS_TK1) }, + [35] = { "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, + [36] = { "Colibri iMX6ULL 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + [37] = { "Apalis iMX8QM 4GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, + [38] = { "Colibri iMX8QXP 2GB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + [39] = { "Colibri iMX7D 1GB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + [40] = { "Colibri iMX6ULL 512MB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + [41] = { "Colibri iMX7D 512MB EPDC", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + [42] = { "Apalis TK1 4GB", TARGET_IS_ENABLED(APALIS_TK1) }, + [43] = { "Colibri T20 512MB IT SETEK", TARGET_IS_ENABLED(COLIBRI_T20) }, + [44] = { "Colibri iMX6ULL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + [45] = { "Colibri iMX6ULL 512MB WB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + [46] = { "Apalis iMX8QXP 2GB WB IT", 0 }, + [47] = { "Apalis iMX8QM 4GB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, + [48] = { "Apalis iMX8QP 2GB WB", TARGET_IS_ENABLED(APALIS_IMX8) }, + [49] = { "Apalis iMX8QP 2GB", TARGET_IS_ENABLED(APALIS_IMX8) }, + [50] = { "Colibri iMX8QXP 2GB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + [51] = { "Colibri iMX8DX 1GB WB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + [52] = { "Colibri iMX8DX 1GB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + [53] = { "Apalis iMX8QXP 2GB ECC IT", 0 }, + [54] = { "Apalis iMX8DXP 1GB", TARGET_IS_ENABLED(APALIS_IMX8) }, + [55] = { "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + [56] = { "Verdin iMX8M Nano Quad 1GB WB", 0 }, + [57] = { "Verdin iMX8M Mini DualLite 1GB", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + [58] = { "Verdin iMX8M Plus Quad 4GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [59] = { "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + [60] = { "Verdin iMX8M Mini DualLite 1GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + [61] = { "Verdin iMX8M Plus Quad 2GB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [62] = { "Colibri iMX6ULL 1GB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + [63] = { "Verdin iMX8M Plus Quad 4GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [64] = { "Verdin iMX8M Plus Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [65] = { "Verdin iMX8M Plus QuadLite 1GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [66] = { "Verdin iMX8M Plus Quad 8GB WB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [67] = { "Apalis iMX8QM 8GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, + [68] = { "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + [70] = { "Verdin iMX8M Plus Quad 8GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + [86] = { "Verdin iMX8M Mini DualLite 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, +}; + +struct pid4list { + int pid4; + char * const name; }; -const char * const toradex_carrier_boards[] = { - [0] = "UNKNOWN CARRIER BOARD", - [155] = "Dahlia", - [156] = "Verdin Development Board", +const struct pid4list toradex_carrier_boards[] = { + /* the code assumes unknown at index 0 */ + {0, "UNKNOWN CARRIER BOARD"}, + {DAHLIA, "Dahlia"}, + {VERDIN_DEVELOPMENT_BOARD, "Verdin Development Board"}, + {YAVIA, "Yavia"}, }; -const char * const toradex_display_adapters[] = { - [0] = "UNKNOWN DISPLAY ADAPTER", - [157] = "Verdin DSI to HDMI Adapter", - [159] = "Verdin DSI to LVDS Adapter", +const struct pid4list toradex_display_adapters[] = { + /* the code assumes unknown at index 0 */ + {0, "UNKNOWN DISPLAY ADAPTER"}, + {VERDIN_DSI_TO_HDMI_ADAPTER, "Verdin DSI to HDMI Adapter"}, + {VERDIN_DSI_TO_LVDS_ADAPTER, "Verdin DSI to LVDS Adapter"}, }; +const u32 toradex_ouis[] = { + [0] = 0x00142dUL, + [1] = 0x8c06cbUL, +}; + +const char * const get_toradex_carrier_boards(int pid4) +{ + int i, index = 0; + + for (i = 1; i < ARRAY_SIZE(toradex_carrier_boards); i++) { + if (pid4 == toradex_carrier_boards[i].pid4) { + index = i; + break; + } + } + return toradex_carrier_boards[index].name; +} + +const char * const get_toradex_display_adapters(int pid4) +{ + int i, index = 0; + + for (i = 1; i < ARRAY_SIZE(toradex_display_adapters); i++) { + if (pid4 == toradex_display_adapters[i].pid4) { + index = i; + break; + } + } + return toradex_display_adapters[index].name; +} + +static u32 get_serial_from_mac(struct toradex_eth_addr *eth_addr) +{ + int i; + u32 oui = ntohl(eth_addr->oui) >> 8; + u32 nic = ntohl(eth_addr->nic) >> 8; + + for (i = 0; i < ARRAY_SIZE(toradex_ouis); i++) { + if (toradex_ouis[i] == oui) + break; + } + + return (u32)((i << 24) + nic); +} + +void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr) +{ + u8 oui_index = tdx_serial >> 24; + u32 nic = tdx_serial & GENMASK(23, 0); + u32 oui; + + if (oui_index >= ARRAY_SIZE(toradex_ouis)) { + puts("Can't find OUI for this serial#\n"); + oui_index = 0; + } + + oui = toradex_ouis[oui_index]; + + eth_addr->oui = htonl(oui << 8); + eth_addr->nic = htonl(nic << 8); +} + #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC static int tdx_cfg_block_mmc_storage(u8 *config_block, int write) { @@ -336,8 +395,7 @@ int read_tdx_cfg_block(void) memcpy(&tdx_eth_addr, config_block + offset, 6); - /* NIC part of MAC address is serial number */ - tdx_serial = ntohl(tdx_eth_addr.nic) >> 8; + tdx_serial = get_serial_from_mac(&tdx_eth_addr); break; case TAG_HW: memcpy(&tdx_hw_tag, config_block + offset, 8); @@ -350,8 +408,7 @@ int read_tdx_cfg_block(void) } /* Cap product id to avoid issues with a yet unknown one */ - if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) / - sizeof(toradex_modules[0]))) + if (tdx_hw_tag.prodid >= ARRAY_SIZE(toradex_modules)) tdx_hw_tag.prodid = 0; out: @@ -359,213 +416,56 @@ out: return ret; } +static int parse_assembly_string(char *string_to_parse, u16 *assembly) +{ + if (string_to_parse[3] >= 'A' && string_to_parse[3] <= 'Z') + *assembly = string_to_parse[3] - 'A'; + else if (string_to_parse[3] == '#') + *assembly = dectoul(&string_to_parse[4], NULL); + else + return -EINVAL; + + return 0; +} + static int get_cfgblock_interactive(void) { char message[CONFIG_SYS_CBSIZE]; - char *soc; - char it = 'n'; - char wb = 'n'; int len = 0; + int ret = 0; + unsigned int prodid; + int i; - /* Unknown module by default */ - tdx_hw_tag.prodid = 0; - - if (cpu_is_pxa27x()) - sprintf(message, "Is the module the 312 MHz version? [y/N] "); - else - sprintf(message, "Is the module an IT version? [y/N] "); + printf("Enabled modules:\n"); + for (i = 0; i < ARRAY_SIZE(toradex_modules); i++) { + if (toradex_modules[i].is_enabled) + printf(" %04d %s\n", i, toradex_modules[i].name); + } + sprintf(message, "Enter the module ID: "); len = cli_readline(message); - it = console_buffer[0]; - -#if defined(CONFIG_TARGET_APALIS_IMX8) || \ - defined(CONFIG_TARGET_APALIS_IMX8X) || \ - defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \ - defined(CONFIG_TARGET_COLIBRI_IMX8X) || \ - defined(CONFIG_TARGET_VERDIN_IMX8MM) || \ - defined(CONFIG_TARGET_VERDIN_IMX8MP) - sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] "); - len = cli_readline(message); - wb = console_buffer[0]; -#endif - - soc = env_get("soc"); - if (!strcmp("mx6", soc)) { -#ifdef CONFIG_TARGET_APALIS_IMX6 - if (it == 'y' || it == 'Y') { - if (is_cpu_type(MXC_CPU_MX6Q)) - tdx_hw_tag.prodid = APALIS_IMX6Q_IT; - else - tdx_hw_tag.prodid = APALIS_IMX6D_IT; - } else { - if (is_cpu_type(MXC_CPU_MX6Q)) - tdx_hw_tag.prodid = APALIS_IMX6Q; - else - tdx_hw_tag.prodid = APALIS_IMX6D; - } -#elif CONFIG_TARGET_COLIBRI_IMX6 - if (it == 'y' || it == 'Y') { - if (is_cpu_type(MXC_CPU_MX6DL)) - tdx_hw_tag.prodid = COLIBRI_IMX6DL_IT; - else if (is_cpu_type(MXC_CPU_MX6SOLO)) - tdx_hw_tag.prodid = COLIBRI_IMX6S_IT; - } else { - if (is_cpu_type(MXC_CPU_MX6DL)) - tdx_hw_tag.prodid = COLIBRI_IMX6DL; - else if (is_cpu_type(MXC_CPU_MX6SOLO)) - tdx_hw_tag.prodid = COLIBRI_IMX6S; - } -#elif CONFIG_TARGET_COLIBRI_IMX6ULL - if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT; - else - if (gd->ram_size == 0x20000000) - tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT; - else - tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT_EMMC; - } else { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT; - else - tdx_hw_tag.prodid = COLIBRI_IMX6ULL; - } -#endif - } else if (!strcmp("imx7d", soc)) - if (gd->ram_size == 0x20000000) - tdx_hw_tag.prodid = COLIBRI_IMX7D; - else - tdx_hw_tag.prodid = COLIBRI_IMX7D_EMMC; - else if (!strcmp("imx7s", soc)) - tdx_hw_tag.prodid = COLIBRI_IMX7S; - else if (is_cpu_type(MXC_CPU_IMX8QM)) { - if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT; - else - tdx_hw_tag.prodid = APALIS_IMX8QM_IT; - } else { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = APALIS_IMX8QP_WIFI_BT; - else - tdx_hw_tag.prodid = APALIS_IMX8QP; - } - } else if (is_cpu_type(MXC_CPU_IMX8QXP)) { -#ifdef CONFIG_TARGET_APALIS_IMX8X - if (it == 'y' || it == 'Y' || wb == 'y' || wb == 'Y') { - tdx_hw_tag.prodid = APALIS_IMX8QXP_WIFI_BT_IT; - } else { - if (gd->ram_size == 0x40000000) - tdx_hw_tag.prodid = APALIS_IMX8DXP; - else - tdx_hw_tag.prodid = APALIS_IMX8QXP; - } -#elif CONFIG_TARGET_COLIBRI_IMX8X - if (it == 'y' || it == 'Y') { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT; - else - tdx_hw_tag.prodid = COLIBRI_IMX8QXP_IT; - } else { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = COLIBRI_IMX8DX_WIFI_BT; - else - tdx_hw_tag.prodid = COLIBRI_IMX8DX; - } -#endif - } else if (is_cpu_type(MXC_CPU_IMX8MMDL)) { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = VERDIN_IMX8MMDL_WIFI_BT_IT; - else - tdx_hw_tag.prodid = VERDIN_IMX8MMDL; - } else if (is_cpu_type(MXC_CPU_IMX8MM)) { - if (wb == 'y' || wb == 'Y') - tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT; - else - tdx_hw_tag.prodid = VERDIN_IMX8MMQ_IT; - } else if (is_cpu_type(MXC_CPU_IMX8MN)) { - tdx_hw_tag.prodid = VERDIN_IMX8MNQ_WIFI_BT; - } else if (is_cpu_type(MXC_CPU_IMX8MPL)) { - tdx_hw_tag.prodid = VERDIN_IMX8MPQL_IT; - } else if (is_cpu_type(MXC_CPU_IMX8MP)) { - if (wb == 'y' || wb == 'Y') - if (gd->ram_size == 0x80000000) - tdx_hw_tag.prodid = VERDIN_IMX8MPQ_2GB_WIFI_BT_IT; - else if (gd->ram_size == 0x200000000) - tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT; - else - tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT; - else - if (it == 'y' || it == 'Y') - tdx_hw_tag.prodid = VERDIN_IMX8MPQ_IT; - else - tdx_hw_tag.prodid = VERDIN_IMX8MPQ; - } else if (!strcmp("tegra20", soc)) { - if (it == 'y' || it == 'Y') - if (gd->ram_size == 0x10000000) - tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT; - else - tdx_hw_tag.prodid = COLIBRI_T20_512MB_IT; - else - if (gd->ram_size == 0x10000000) - tdx_hw_tag.prodid = COLIBRI_T20_256MB; - else - tdx_hw_tag.prodid = COLIBRI_T20_512MB; - } else if (cpu_is_pxa27x()) { - if (it == 'y' || it == 'Y') - tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ; - else - tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ; - } -#if defined(CONFIG_TARGET_APALIS_T30) || defined(CONFIG_TARGET_COLIBRI_T30) - else if (!strcmp("tegra30", soc)) { -#ifdef CONFIG_TARGET_APALIS_T30 - if (it == 'y' || it == 'Y') - tdx_hw_tag.prodid = APALIS_T30_IT; - else - if (gd->ram_size == 0x40000000) - tdx_hw_tag.prodid = APALIS_T30_1GB; - else - tdx_hw_tag.prodid = APALIS_T30_2GB; -#else - if (it == 'y' || it == 'Y') - tdx_hw_tag.prodid = COLIBRI_T30_IT; - else - tdx_hw_tag.prodid = COLIBRI_T30; -#endif - } -#endif /* CONFIG_TARGET_APALIS_T30 || CONFIG_TARGET_COLIBRI_T30 */ - else if (!strcmp("tegra124", soc)) { - tdx_hw_tag.prodid = APALIS_TK1_2GB; - } else if (!strcmp("vf500", soc)) { - if (it == 'y' || it == 'Y') - tdx_hw_tag.prodid = COLIBRI_VF50_IT; - else - tdx_hw_tag.prodid = COLIBRI_VF50; - } else if (!strcmp("vf610", soc)) { - if (it == 'y' || it == 'Y') - tdx_hw_tag.prodid = COLIBRI_VF61_IT; - else - tdx_hw_tag.prodid = COLIBRI_VF61; - } - if (!tdx_hw_tag.prodid) { - printf("Module type not detectable due to unknown SoC\n"); + prodid = dectoul(console_buffer, NULL); + if (prodid >= ARRAY_SIZE(toradex_modules) || !toradex_modules[prodid].is_enabled) { + printf("Parsing module id failed\n"); return -1; } + tdx_hw_tag.prodid = prodid; + len = 0; while (len < 4) { - sprintf(message, "Enter the module version (e.g. V1.1B): V"); + sprintf(message, "Enter the module version (e.g. V1.1B or V1.1#26): V"); len = cli_readline(message); } tdx_hw_tag.ver_major = console_buffer[0] - '0'; tdx_hw_tag.ver_minor = console_buffer[2] - '0'; - tdx_hw_tag.ver_assembly = console_buffer[3] - 'A'; - if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1) - tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ - - COLIBRI_PXA270_V1_312MHZ); + ret = parse_assembly_string(console_buffer, &tdx_hw_tag.ver_assembly); + if (ret) { + printf("Parsing module version failed\n"); + return ret; + } while (len < 8) { sprintf(message, "Enter module serial number: "); @@ -768,26 +668,32 @@ static int get_cfgblock_carrier_interactive(void) { char message[CONFIG_SYS_CBSIZE]; int len; + int ret = 0; printf("Supported carrier boards:\n"); - printf("CARRIER BOARD NAME\t\t [ID]\n"); - for (int i = 0; i < sizeof(toradex_carrier_boards) / - sizeof(toradex_carrier_boards[0]); i++) - if (toradex_carrier_boards[i]) - printf("%s \t\t [%d]\n", toradex_carrier_boards[i], i); + printf("%30s\t[ID]\n", "CARRIER BOARD NAME"); + for (int i = 0; i < ARRAY_SIZE(toradex_carrier_boards); i++) + printf("%30s\t[%d]\n", + toradex_carrier_boards[i].name, + toradex_carrier_boards[i].pid4); sprintf(message, "Choose your carrier board (provide ID): "); len = cli_readline(message); tdx_car_hw_tag.prodid = dectoul(console_buffer, NULL); do { - sprintf(message, "Enter carrier board version (e.g. V1.1B): V"); + sprintf(message, "Enter carrier board version (e.g. V1.1B or V1.1#26): V"); len = cli_readline(message); } while (len < 4); tdx_car_hw_tag.ver_major = console_buffer[0] - '0'; tdx_car_hw_tag.ver_minor = console_buffer[2] - '0'; - tdx_car_hw_tag.ver_assembly = console_buffer[3] - 'A'; + + ret = parse_assembly_string(console_buffer, &tdx_car_hw_tag.ver_assembly); + if (ret) { + printf("Parsing module version failed\n"); + return ret; + } while (len < 8) { sprintf(message, "Enter carrier board serial number: "); @@ -964,8 +870,7 @@ static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc, } /* Convert serial number to MAC address (the storage format) */ - tdx_eth_addr.oui = htonl(0x00142dUL << 8); - tdx_eth_addr.nic = htonl(tdx_serial << 8); + get_mac_from_serial(tdx_serial, &tdx_eth_addr); /* Valid Tag */ write_tag(config_block, &offset, TAG_VALID, NULL, 0); diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index ddcf699748..2bf7c5123c 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -20,6 +20,11 @@ struct toradex_eth_addr { u32 nic:24; } __attribute__((__packed__)); +struct toradex_som { + const char *name; + int is_enabled; +}; + enum { COLIBRI_PXA270_V1_312MHZ = 1, COLIBRI_PXA270_V1_520MHZ, @@ -31,7 +36,7 @@ enum { COLIBRI_PXA270_312MHZ, COLIBRI_PXA270_520MHZ, COLIBRI_VF50, /* 10 */ - COLIBRI_VF61, /* not currently on sale */ + COLIBRI_VF61, COLIBRI_VF61_IT, COLIBRI_VF50_IT, COLIBRI_IMX6S, @@ -62,7 +67,7 @@ enum { COLIBRI_IMX7D_EMMC, COLIBRI_IMX6ULL_WIFI_BT_IT, /* 40 */ COLIBRI_IMX7D_EPDC, - APALIS_TK1_4GB, /* not currently on sale */ + APALIS_TK1_4GB, COLIBRI_T20_512MB_IT_SETEK, COLIBRI_IMX6ULL_IT, COLIBRI_IMX6ULL_WIFI_BT, /* 45 */ @@ -87,11 +92,18 @@ enum { VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, VERDIN_IMX8MPQL_IT, /* 65 */ VERDIN_IMX8MPQ_8GB_WIFI_BT, + APALIS_IMX8QM_8GB_WIFI_BT_IT, + VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN, + /* 69 */ + VERDIN_IMX8MPQ_8GB_WIFI_BT_IT = 70, /* 70 */ + /* 71-85 */ + VERDIN_IMX8MMDL_2G_IT = 86, }; enum { DAHLIA = 155, VERDIN_DEVELOPMENT_BOARD = 156, + YAVIA = 173, }; enum { @@ -99,8 +111,7 @@ enum { VERDIN_DSI_TO_LVDS_ADAPTER = 159, }; -extern const char * const toradex_modules[]; -extern const char * const toradex_carrier_boards[]; +extern const struct toradex_som toradex_modules[]; extern bool valid_cfgblock; extern struct toradex_hw tdx_hw_tag; extern struct toradex_hw tdx_car_hw_tag; @@ -110,7 +121,10 @@ extern u32 tdx_car_serial; int read_tdx_cfg_block(void); int read_tdx_cfg_block_carrier(void); - +const char * const get_toradex_carrier_boards(int pid4); +const char * const get_toradex_display_adapters(int pid4); int try_migrate_tdx_cfg_block_carrier(void); +void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr); + #endif /* _TDX_CFG_BLOCK_H */ diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index 9db4553e0f..de94036c47 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -20,16 +20,18 @@ #include <asm/setup.h> #include "tdx-common.h" -#define TORADEX_OUI 0x00142dUL +#define SERIAL_STR_LEN 8 +#define MODULE_VER_STR_LEN 4 // V1.1 +#define MODULE_REV_STR_LEN 3 // [A-Z] or #[26-99] #ifdef CONFIG_TDX_CFG_BLOCK -static char tdx_serial_str[9]; -static char tdx_board_rev_str[6]; +static char tdx_serial_str[SERIAL_STR_LEN + 1]; +static char tdx_board_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1]; #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA -static char tdx_car_serial_str[9]; -static char tdx_car_rev_str[6]; -static char *tdx_carrier_board_name; +static char tdx_car_serial_str[SERIAL_STR_LEN + 1]; +static char tdx_car_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1]; +static const char *tdx_carrier_board_name; #endif #if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) @@ -79,42 +81,60 @@ void get_board_serial(struct tag_serialnr *serialnr) } #endif /* CONFIG_SERIAL_TAG */ +static const char *get_board_assembly(u16 ver_assembly) +{ + static char ver_name[MODULE_REV_STR_LEN + 1]; + + if (ver_assembly < 26) { + ver_name[0] = (char)ver_assembly + 'A'; + ver_name[1] = '\0'; + } else { + snprintf(ver_name, sizeof(ver_name), + "#%u", ver_assembly); + } + + return ver_name; +} + int show_board_info(void) { unsigned char ethaddr[6]; if (read_tdx_cfg_block()) { printf("MISSING TORADEX CONFIG BLOCK\n"); - tdx_eth_addr.oui = htonl(TORADEX_OUI << 8); - tdx_eth_addr.nic = htonl(tdx_serial << 8); + get_mac_from_serial(tdx_serial, &tdx_eth_addr); checkboard(); } else { - sprintf(tdx_serial_str, "%08u", tdx_serial); - sprintf(tdx_board_rev_str, "V%1d.%1d%c", - tdx_hw_tag.ver_major, - tdx_hw_tag.ver_minor, - (char)tdx_hw_tag.ver_assembly + 'A'); + snprintf(tdx_serial_str, sizeof(tdx_serial_str), + "%08u", tdx_serial); + snprintf(tdx_board_rev_str, sizeof(tdx_board_rev_str), + "V%1d.%1d%s", + tdx_hw_tag.ver_major, + tdx_hw_tag.ver_minor, + get_board_assembly(tdx_hw_tag.ver_assembly)); env_set("serial#", tdx_serial_str); - printf("Model: Toradex %s %s, Serial# %s\n", - toradex_modules[tdx_hw_tag.prodid], - tdx_board_rev_str, - tdx_serial_str); + printf("Model: Toradex %04d %s %s\n", + tdx_hw_tag.prodid, + toradex_modules[tdx_hw_tag.prodid].name, + tdx_board_rev_str); + printf("Serial#: %s\n", tdx_serial_str); #ifdef CONFIG_TDX_CFG_BLOCK_EXTRA if (read_tdx_cfg_block_carrier()) { printf("MISSING TORADEX CARRIER CONFIG BLOCKS\n"); try_migrate_tdx_cfg_block_carrier(); } else { - tdx_carrier_board_name = (char *) - toradex_carrier_boards[tdx_car_hw_tag.prodid]; + tdx_carrier_board_name = + get_toradex_carrier_boards(tdx_car_hw_tag.prodid); - sprintf(tdx_car_serial_str, "%08u", tdx_car_serial); - sprintf(tdx_car_rev_str, "V%1d.%1d%c", - tdx_car_hw_tag.ver_major, - tdx_car_hw_tag.ver_minor, - (char)tdx_car_hw_tag.ver_assembly + - 'A'); + snprintf(tdx_car_serial_str, sizeof(tdx_car_serial_str), + "%08u", tdx_car_serial); + snprintf(tdx_car_rev_str, sizeof(tdx_car_rev_str), + "V%1d.%1d%s", + tdx_car_hw_tag.ver_major, + tdx_car_hw_tag.ver_minor, + get_board_assembly(tdx_car_hw_tag.ver_assembly)); env_set("carrier_serial#", tdx_car_serial_str); printf("Carrier: Toradex %s %s, Serial# %s\n", @@ -132,8 +152,8 @@ int show_board_info(void) if (!eth_env_get_enetaddr("ethaddr", ethaddr)) eth_env_set_enetaddr("ethaddr", (u8 *)&tdx_eth_addr); -#ifdef CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR - if (!eth_env_get_enetaddr("eth1addr", ethaddr)) { + if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK_2ND_ETHADDR) && + !eth_env_get_enetaddr("eth1addr", ethaddr)) { /* * Secondary MAC address is allocated from block * 0x100000 higher then the first MAC address @@ -142,7 +162,6 @@ int show_board_info(void) ethaddr[3] += 0x10; eth_env_set_enetaddr("eth1addr", ethaddr); } -#endif return 0; } @@ -170,7 +189,7 @@ int ft_common_board_setup(void *blob, struct bd_info *bd) if (tdx_hw_tag.ver_major) { char prod_id[5]; - sprintf(prod_id, "%04u", tdx_hw_tag.prodid); + snprintf(prod_id, sizeof(prod_id), "%04u", tdx_hw_tag.prodid); fdt_setprop(blob, 0, "toradex,product-id", prod_id, 5); fdt_setprop(blob, 0, "toradex,board-rev", tdx_board_rev_str, diff --git a/board/toradex/common/tdx-common.h b/board/toradex/common/tdx-common.h index c96e8754e9..d446e9f1d5 100644 --- a/board/toradex/common/tdx-common.h +++ b/board/toradex/common/tdx-common.h @@ -12,8 +12,4 @@ int ft_common_board_setup(void *blob, struct bd_info *bd); u32 get_board_revision(void); -#if defined(CONFIG_DM_VIDEO) -int show_boot_logo(void); -#endif - #endif /* _TDX_COMMON_H */ diff --git a/board/toradex/verdin-imx8mm/lpddr4_timing.c b/board/toradex/verdin-imx8mm/lpddr4_timing.c index d114abf9d6..4dfec679b1 100644 --- a/board/toradex/verdin-imx8mm/lpddr4_timing.c +++ b/board/toradex/verdin-imx8mm/lpddr4_timing.c @@ -1,12 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Toradex + * Copyright 2023 Toradex * * Generated code from MX8M_DDR_tool - * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga * - * DDR calibration created with mscale_ddr_tool_v210_setup.exe using - * MX8M_Mini_LPDDR4_RPA_v14 Verdin iMX8MM V1.0.xlsx as of 1. Nov. 2019. + * DDR calibration created with mscale_ddr_tool_v3.31_setup.exe using + * MX8M_Mini_LPDDR4_RPA_v22 Verdin iMX8MM V1.0.xlsx as of 7. Aug. 2023. */ #include <linux/kernel.h> @@ -17,22 +16,22 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400304, 0x1}, {0x3d400030, 0x1}, {0x3d400000, 0xa1080020}, - {0x3d400020, 0x203}, + {0x3d400020, 0x202}, {0x3d400024, 0x3a980}, - {0x3d400064, 0x5b00d2}, + {0x3d400064, 0x2d00d2}, {0x3d4000d0, 0xc00305ba}, {0x3d4000d4, 0x940000}, {0x3d4000dc, 0xd4002d}, {0x3d4000e0, 0x310000}, {0x3d4000e8, 0x66004d}, {0x3d4000ec, 0x16004d}, - {0x3d400100, 0x191e1920}, + {0x3d400100, 0x191e0c20}, {0x3d400104, 0x60630}, {0x3d40010c, 0xb0b000}, {0x3d400110, 0xe04080e}, {0x3d400114, 0x2040c0c}, {0x3d400118, 0x1010007}, - {0x3d40011c, 0x401}, + {0x3d40011c, 0x402}, {0x3d400130, 0x20600}, {0x3d400134, 0xc100002}, {0x3d400138, 0xd8}, @@ -49,7 +48,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d4001b0, 0x11}, {0x3d4001c0, 0x1}, {0x3d4001c4, 0x1}, - {0x3d4000f4, 0xc99}, + {0x3d4000f4, 0x699}, {0x3d400108, 0x70e1617}, {0x3d400200, 0x1f}, {0x3d40020c, 0x0}, @@ -57,6 +56,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400204, 0x80808}, {0x3d400214, 0x7070707}, {0x3d400218, 0x7070707}, + {0x3d40021c, 0xf0f}, {0x3d400250, 0x29001701}, {0x3d400254, 0x2c}, {0x3d40025c, 0x4000030}, @@ -68,22 +68,22 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d400498, 0x620096}, {0x3d40049c, 0x1100e07}, {0x3d4004a0, 0xc8012c}, - {0x3d402020, 0x1}, + {0x3d402020, 0x0}, {0x3d402024, 0x7d00}, {0x3d402050, 0x20d040}, - {0x3d402064, 0xc001c}, + {0x3d402064, 0x6001c}, {0x3d4020dc, 0x840000}, {0x3d4020e0, 0x310000}, {0x3d4020e8, 0x66004d}, {0x3d4020ec, 0x16004d}, - {0x3d402100, 0xa040305}, + {0x3d402100, 0xa040105}, {0x3d402104, 0x30407}, {0x3d402108, 0x203060b}, {0x3d40210c, 0x505000}, {0x3d402110, 0x2040202}, {0x3d402114, 0x2030202}, {0x3d402118, 0x1010004}, - {0x3d40211c, 0x301}, + {0x3d40211c, 0x302}, {0x3d402130, 0x20300}, {0x3d402134, 0xa100002}, {0x3d402138, 0x1d}, @@ -92,8 +92,8 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d402190, 0x3818200}, {0x3d402194, 0x80303}, {0x3d4021b4, 0x100}, - {0x3d4020f4, 0xc99}, - {0x3d403020, 0x1}, + {0x3d4020f4, 0x599}, + {0x3d403020, 0x0}, {0x3d403024, 0x1f40}, {0x3d403050, 0x20d040}, {0x3d403064, 0x30007}, @@ -108,7 +108,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d403110, 0x2040202}, {0x3d403114, 0x2030202}, {0x3d403118, 0x1010004}, - {0x3d40311c, 0x301}, + {0x3d40311c, 0x302}, {0x3d403130, 0x20300}, {0x3d403134, 0xa100002}, {0x3d403138, 0x8}, @@ -117,7 +117,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { {0x3d403190, 0x3818200}, {0x3d403194, 0x80303}, {0x3d4031b4, 0x100}, - {0x3d4030f4, 0xc99}, + {0x3d4030f4, 0x599}, {0x3d400028, 0x0}, }; @@ -205,8 +205,8 @@ struct dram_cfg_param ddr_ddrphy_cfg[] = { {0x220024, 0x1ab}, {0x2003a, 0x0}, {0x20056, 0x3}, - {0x120056, 0xa}, - {0x220056, 0xa}, + {0x120056, 0x3}, + {0x220056, 0x3}, {0x1004d, 0xe00}, {0x1014d, 0xe00}, {0x1104d, 0xe00}, @@ -1058,7 +1058,6 @@ struct dram_cfg_param ddr_fsp0_cfg[] = { {0x54008, 0x131f}, {0x54009, 0xc8}, {0x5400b, 0x2}, - {0x5400d, 0x100}, {0x54012, 0x110}, {0x54019, 0x2dd4}, {0x5401a, 0x31}, @@ -1098,7 +1097,6 @@ struct dram_cfg_param ddr_fsp1_cfg[] = { {0x54008, 0x121f}, {0x54009, 0xc8}, {0x5400b, 0x2}, - {0x5400d, 0x100}, {0x54012, 0x110}, {0x54019, 0x84}, {0x5401a, 0x31}, @@ -1138,7 +1136,6 @@ struct dram_cfg_param ddr_fsp2_cfg[] = { {0x54008, 0x121f}, {0x54009, 0xc8}, {0x5400b, 0x2}, - {0x5400d, 0x100}, {0x54012, 0x110}, {0x54019, 0x84}, {0x5401a, 0x31}, @@ -1204,7 +1201,7 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = { {0x5403b, 0x4d}, {0x5403c, 0x4d}, {0x5403d, 0x1600}, - { 0xd0000, 0x1 }, + {0xd0000, 0x1}, }; /* DRAM PHY init engine image */ @@ -1697,15 +1694,15 @@ struct dram_cfg_param ddr_phy_pie[] = { {0x400d6, 0x20a}, {0x400d7, 0x20b}, {0x2003a, 0x2}, - {0x2000b, 0x5d}, + {0x2000b, 0x34b}, {0x2000c, 0xbb}, {0x2000d, 0x753}, {0x2000e, 0x2c}, - {0x12000b, 0xc}, + {0x12000b, 0x70}, {0x12000c, 0x19}, {0x12000d, 0xfa}, {0x12000e, 0x10}, - {0x22000b, 0x3}, + {0x22000b, 0x1c}, {0x22000c, 0x6}, {0x22000d, 0x3e}, {0x22000e, 0x10}, @@ -1846,5 +1843,5 @@ struct dram_timing_info dram_timing = { .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3000, 400, 100, }, + .fsp_table = {3000, 400, 100,}, }; diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c index 97d6a31da1..c2e43368a9 100644 --- a/board/toradex/verdin-imx8mm/spl.c +++ b/board/toradex/verdin-imx8mm/spl.c @@ -23,7 +23,6 @@ #include <dm/uclass-internal.h> #include <hang.h> #include <i2c.h> -#include <power/bd71837.h> #include <power/pca9450.h> #include <power/pmic.h> #include <spl.h> @@ -35,14 +34,11 @@ DECLARE_GLOBAL_DATA_PTR; int spl_board_boot_device(enum boot_device boot_dev_spl) { switch (boot_dev_spl) { - case MMC1_BOOT: + case MMC1_BOOT: /* eMMC */ return BOOT_DEVICE_MMC1; - case SD2_BOOT: + case SD2_BOOT: /* SD card */ case MMC2_BOOT: return BOOT_DEVICE_MMC2; - case SD3_BOOT: - case MMC3_BOOT: - return BOOT_DEVICE_MMC1; case USB_BOOT: return BOOT_DEVICE_BOARD; default: @@ -57,12 +53,14 @@ void spl_dram_init(void) void spl_board_init(void) { - /* Serial download mode */ - if (is_usb_boot()) { - puts("Back to ROM, SDP\n"); - restore_boot_params(); + if (IS_ENABLED(CONFIG_FSL_CAAM)) { + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); + if (ret) + printf("Failed to initialize %s: %d\n", dev->name, ret); } - puts("Normal Boot\n"); } #ifdef CONFIG_SPL_LOAD_FIT @@ -75,30 +73,21 @@ int board_fit_config_name_match(const char *name) } #endif -#define UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE4) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) -/* Verdin UART_3, Console/Debug UART */ -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_SAI2_RXFS_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_SAI2_RXC_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; -int board_early_init_f(void) +__weak void board_early_init(void) { struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + init_uart_clk(0); + imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); set_wdog_reset(wdog); - - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - - return 0; } int power_init_board(void) @@ -140,14 +129,10 @@ void board_init_f(ulong dummy) arch_cpu_init(); - init_uart_clk(0); - - board_early_init_f(); + board_early_init(); timer_init(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -165,6 +150,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + enable_tzc380(); power_init_board(); diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index c51c99b515..2b4dadd469 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -14,6 +14,7 @@ #include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <usb.h> #include "../common/tdx-cfg-block.h" @@ -52,6 +53,24 @@ int board_mmc_get_env_dev(int devno) return devno; } +int board_usb_init(int index, enum usb_init_type init) +{ + debug("%s: %d, type %d\n", __func__, index, init); + + imx8m_usb_power(index, true); + + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + debug("%s: %d, type %d\n", __func__, index, init); + + imx8m_usb_power(index, false); + + return 0; +} + static enum pcb_rev_t get_pcb_revision(void) { struct udevice *bus; @@ -83,7 +102,8 @@ static void select_dt_from_module_version(void) * device tree. */ is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) || - (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT); + (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT) || + (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN); } switch (get_pcb_revision()) { @@ -101,9 +121,6 @@ static void select_dt_from_module_version(void) if (strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); - - if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) - env_save(); } } @@ -127,6 +144,6 @@ int board_phys_sdram_size(phys_size_t *size) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { - return 0; + return ft_common_board_setup(blob, bd); } #endif diff --git a/board/toradex/verdin-imx8mp/lpddr4_timing.c b/board/toradex/verdin-imx8mp/lpddr4_timing.c index 3e00d9b51e..29ea31e146 100644 --- a/board/toradex/verdin-imx8mp/lpddr4_timing.c +++ b/board/toradex/verdin-imx8mp/lpddr4_timing.c @@ -13,6 +13,33 @@ #include <linux/kernel.h> #include <asm/arch/ddr.h> +#include "lpddr4_timing.h" + +struct dram_cfg_param ddr_ddrc_cfg_single_rank_patch[] = { + { 0x3d400000, 0xa1080020}, + { 0x3d400200, 0x1f}, + { 0x3d40021c, 0xf07} +}; + +struct dram_cfg_param ddr_fsp0_cfg_single_rank_patch[] = { + { 0x54012, 0x110}, + { 0x5402c, 0x1} +}; + +struct dram_cfg_param ddr_fsp1_cfg_single_rank_patch[] = { + { 0x54012, 0x110}, + { 0x5402c, 0x1} +}; + +struct dram_cfg_param ddr_fsp2_cfg_single_rank_patch[] = { + { 0x54012, 0x110}, + { 0x5402c, 0x1} +}; + +struct dram_cfg_param ddr_fsp0_2d_cfg_single_rank_patch[] = { + { 0x54012, 0x110}, + { 0x5402c, 0x1} +}; struct dram_cfg_param ddr_ddrc_cfg[] = { /** Initialize DDRC registers **/ @@ -21,9 +48,9 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d400000, 0xa3080020 }, { 0x3d400020, 0x1303 }, { 0x3d400024, 0x1e84800 }, - { 0x3d400064, 0x7a0118 }, - { 0x3d400070, 0x61027f10 }, - { 0x3d400074, 0x7b0 }, + { 0x3d400064, 0x7a017c }, + { 0x3d400070, 0x7027f90 }, + { 0x3d400074, 0x790 }, { 0x3d4000d0, 0xc00307a3 }, { 0x3d4000d4, 0xc50000 }, { 0x3d4000dc, 0xf4003f }, @@ -31,15 +58,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d4000e8, 0x660048 }, { 0x3d4000ec, 0x160048 }, { 0x3d400100, 0x2028222a }, - { 0x3d400104, 0x807bf }, + { 0x3d400104, 0x8083f }, { 0x3d40010c, 0xe0e000 }, { 0x3d400110, 0x12040a12 }, { 0x3d400114, 0x2050f0f }, { 0x3d400118, 0x1010009 }, - { 0x3d40011c, 0x501 }, + { 0x3d40011c, 0x502 }, { 0x3d400130, 0x20800 }, { 0x3d400134, 0xe100002 }, - { 0x3d400138, 0x120 }, + { 0x3d400138, 0x184 }, { 0x3d400144, 0xc80064 }, { 0x3d400180, 0x3e8001e }, { 0x3d400184, 0x3207a12 }, @@ -53,15 +80,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d4001b0, 0x11 }, { 0x3d4001c0, 0x1 }, { 0x3d4001c4, 0x1 }, - { 0x3d4000f4, 0xc99 }, - { 0x3d400108, 0x9121c1c }, - { 0x3d400200, 0x18 }, + { 0x3d4000f4, 0x799 }, + { 0x3d400108, 0x9121b1c }, + { 0x3d400200, 0x17 }, + { 0x3d400208, 0x0 }, { 0x3d40020c, 0x0 }, { 0x3d400210, 0x1f1f }, { 0x3d400204, 0x80808 }, { 0x3d400214, 0x7070707 }, { 0x3d400218, 0x7070707 }, - { 0x3d40021c, 0xf07 }, + { 0x3d40021c, 0xf08 }, { 0x3d400250, 0x1705 }, { 0x3d400254, 0x2c }, { 0x3d40025c, 0x4000030 }, @@ -77,7 +105,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d402020, 0x1001 }, { 0x3d402024, 0x30d400 }, { 0x3d402050, 0x20d000 }, - { 0x3d402064, 0xc001c }, + { 0x3d402064, 0xc0026 }, { 0x3d4020dc, 0x840000 }, { 0x3d4020e0, 0x330000 }, { 0x3d4020e8, 0x660048 }, @@ -89,20 +117,20 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d402110, 0x2040202 }, { 0x3d402114, 0x2030202 }, { 0x3d402118, 0x1010004 }, - { 0x3d40211c, 0x301 }, + { 0x3d40211c, 0x302 }, { 0x3d402130, 0x20300 }, { 0x3d402134, 0xa100002 }, - { 0x3d402138, 0x1d }, + { 0x3d402138, 0x27 }, { 0x3d402144, 0x14000a }, { 0x3d402180, 0x640004 }, { 0x3d402190, 0x3818200 }, { 0x3d402194, 0x80303 }, { 0x3d4021b4, 0x100 }, - { 0x3d4020f4, 0xc99 }, + { 0x3d4020f4, 0x599 }, { 0x3d403020, 0x1001 }, { 0x3d403024, 0xc3500 }, { 0x3d403050, 0x20d000 }, - { 0x3d403064, 0x30007 }, + { 0x3d403064, 0x3000a }, { 0x3d4030dc, 0x840000 }, { 0x3d4030e0, 0x330000 }, { 0x3d4030e8, 0x660048 }, @@ -114,16 +142,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = { { 0x3d403110, 0x2040202 }, { 0x3d403114, 0x2030202 }, { 0x3d403118, 0x1010004 }, - { 0x3d40311c, 0x301 }, + { 0x3d40311c, 0x302 }, { 0x3d403130, 0x20300 }, { 0x3d403134, 0xa100002 }, - { 0x3d403138, 0x8 }, + { 0x3d403138, 0xa }, { 0x3d403144, 0x50003 }, { 0x3d403180, 0x190004 }, { 0x3d403190, 0x3818200 }, { 0x3d403194, 0x80303 }, { 0x3d4031b4, 0x100 }, - { 0x3d4030f4, 0xc99 }, + { 0x3d4030f4, 0x599 }, { 0x3d400028, 0x0 }, }; @@ -1700,15 +1728,15 @@ struct dram_cfg_param ddr_phy_pie[] = { { 0x400d7, 0x20b }, { 0x2003a, 0x2 }, { 0x200be, 0x3 }, - { 0x2000b, 0x7d }, + { 0x2000b, 0x465 }, { 0x2000c, 0xfa }, { 0x2000d, 0x9c4 }, { 0x2000e, 0x2c }, - { 0x12000b, 0xc }, + { 0x12000b, 0x70 }, { 0x12000c, 0x19 }, { 0x12000d, 0xfa }, { 0x12000e, 0x10 }, - { 0x22000b, 0x3 }, + { 0x22000b, 0x1c }, { 0x22000c, 0x6 }, { 0x22000d, 0x3e }, { 0x22000e, 0x10 }, @@ -1834,311 +1862,7 @@ struct dram_fsp_msg ddr_dram_fsp_msg[] = { }, }; -struct dram_cfg_param ddr_ddrc_cfg2[] = { - /** Initialize DDRC registers **/ - { 0x3d400304, 0x1 }, - { 0x3d400030, 0x1 }, - { 0x3d400000, 0xa1080020 }, - { 0x3d400020, 0x1303 }, - { 0x3d400024, 0x1e84800 }, - { 0x3d400064, 0x7a0118 }, - { 0x3d400070, 0x61027f10 }, - { 0x3d400074, 0x7b0 }, - { 0x3d4000d0, 0xc00307a3 }, - { 0x3d4000d4, 0xc50000 }, - { 0x3d4000dc, 0xf4003f }, - { 0x3d4000e0, 0x330000 }, - { 0x3d4000e8, 0x660048 }, - { 0x3d4000ec, 0x160048 }, - { 0x3d400100, 0x2028222a }, - { 0x3d400104, 0x807bf }, - { 0x3d40010c, 0xe0e000 }, - { 0x3d400110, 0x12040a12 }, - { 0x3d400114, 0x2050f0f }, - { 0x3d400118, 0x1010009 }, - { 0x3d40011c, 0x501 }, - { 0x3d400130, 0x20800 }, - { 0x3d400134, 0xe100002 }, - { 0x3d400138, 0x120 }, - { 0x3d400144, 0xc80064 }, - { 0x3d400180, 0x3e8001e }, - { 0x3d400184, 0x3207a12 }, - { 0x3d400188, 0x0 }, - { 0x3d400190, 0x49f820e }, - { 0x3d400194, 0x80303 }, - { 0x3d4001b4, 0x1f0e }, - { 0x3d4001a0, 0xe0400018 }, - { 0x3d4001a4, 0xdf00e4 }, - { 0x3d4001a8, 0x80000000 }, - { 0x3d4001b0, 0x11 }, - { 0x3d4001c0, 0x1 }, - { 0x3d4001c4, 0x1 }, - { 0x3d4000f4, 0xc99 }, - { 0x3d400108, 0x9121c1c }, - { 0x3d400200, 0x1f }, - { 0x3d40020c, 0x0 }, - { 0x3d400210, 0x1f1f }, - { 0x3d400204, 0x80808 }, - { 0x3d400214, 0x7070707 }, - { 0x3d400218, 0x7070707 }, - { 0x3d40021c, 0xf07 }, - { 0x3d400250, 0x1705 }, - { 0x3d400254, 0x2c }, - { 0x3d40025c, 0x4000030 }, - { 0x3d400264, 0x900093e7 }, - { 0x3d40026c, 0x2005574 }, - { 0x3d400400, 0x111 }, - { 0x3d400404, 0x72ff }, - { 0x3d400408, 0x72ff }, - { 0x3d400494, 0x2100e07 }, - { 0x3d400498, 0x620096 }, - { 0x3d40049c, 0x1100e07 }, - { 0x3d4004a0, 0xc8012c }, - { 0x3d402020, 0x1001 }, - { 0x3d402024, 0x30d400 }, - { 0x3d402050, 0x20d000 }, - { 0x3d402064, 0xc001c }, - { 0x3d4020dc, 0x840000 }, - { 0x3d4020e0, 0x330000 }, - { 0x3d4020e8, 0x660048 }, - { 0x3d4020ec, 0x160048 }, - { 0x3d402100, 0xa040305 }, - { 0x3d402104, 0x30407 }, - { 0x3d402108, 0x203060b }, - { 0x3d40210c, 0x505000 }, - { 0x3d402110, 0x2040202 }, - { 0x3d402114, 0x2030202 }, - { 0x3d402118, 0x1010004 }, - { 0x3d40211c, 0x301 }, - { 0x3d402130, 0x20300 }, - { 0x3d402134, 0xa100002 }, - { 0x3d402138, 0x1d }, - { 0x3d402144, 0x14000a }, - { 0x3d402180, 0x640004 }, - { 0x3d402190, 0x3818200 }, - { 0x3d402194, 0x80303 }, - { 0x3d4021b4, 0x100 }, - { 0x3d4020f4, 0xc99 }, - { 0x3d403020, 0x1001 }, - { 0x3d403024, 0xc3500 }, - { 0x3d403050, 0x20d000 }, - { 0x3d403064, 0x30007 }, - { 0x3d4030dc, 0x840000 }, - { 0x3d4030e0, 0x330000 }, - { 0x3d4030e8, 0x660048 }, - { 0x3d4030ec, 0x160048 }, - { 0x3d403100, 0xa010102 }, - { 0x3d403104, 0x30404 }, - { 0x3d403108, 0x203060b }, - { 0x3d40310c, 0x505000 }, - { 0x3d403110, 0x2040202 }, - { 0x3d403114, 0x2030202 }, - { 0x3d403118, 0x1010004 }, - { 0x3d40311c, 0x301 }, - { 0x3d403130, 0x20300 }, - { 0x3d403134, 0xa100002 }, - { 0x3d403138, 0x8 }, - { 0x3d403144, 0x50003 }, - { 0x3d403180, 0x190004 }, - { 0x3d403190, 0x3818200 }, - { 0x3d403194, 0x80303 }, - { 0x3d4031b4, 0x100 }, - { 0x3d4030f4, 0xc99 }, - { 0x3d400028, 0x0 }, -}; - -/* P0 message block parameter for training firmware */ -struct dram_cfg_param ddr_fsp0_cfg2[] = { - { 0xd0000, 0x0 }, - { 0x54003, 0xfa0 }, - { 0x54004, 0x2 }, - { 0x54005, 0x2228 }, - { 0x54006, 0x14 }, - { 0x54008, 0x131f }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x2 }, - { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, - { 0x54019, 0x3ff4 }, - { 0x5401a, 0x33 }, - { 0x5401b, 0x4866 }, - { 0x5401c, 0x4800 }, - { 0x5401e, 0x16 }, - { 0x5401f, 0x3ff4 }, - { 0x54020, 0x33 }, - { 0x54021, 0x4866 }, - { 0x54022, 0x4800 }, - { 0x54024, 0x16 }, - { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, - { 0x54032, 0xf400 }, - { 0x54033, 0x333f }, - { 0x54034, 0x6600 }, - { 0x54035, 0x48 }, - { 0x54036, 0x48 }, - { 0x54037, 0x1600 }, - { 0x54038, 0xf400 }, - { 0x54039, 0x333f }, - { 0x5403a, 0x6600 }, - { 0x5403b, 0x48 }, - { 0x5403c, 0x48 }, - { 0x5403d, 0x1600 }, - { 0xd0000, 0x1 }, -}; - -/* P1 message block parameter for training firmware */ -struct dram_cfg_param ddr_fsp1_cfg2[] = { - { 0xd0000, 0x0 }, - { 0x54002, 0x101 }, - { 0x54003, 0x190 }, - { 0x54004, 0x2 }, - { 0x54005, 0x2228 }, - { 0x54006, 0x14 }, - { 0x54008, 0x121f }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x2 }, - { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, - { 0x54019, 0x84 }, - { 0x5401a, 0x33 }, - { 0x5401b, 0x4866 }, - { 0x5401c, 0x4800 }, - { 0x5401e, 0x16 }, - { 0x5401f, 0x84 }, - { 0x54020, 0x33 }, - { 0x54021, 0x4866 }, - { 0x54022, 0x4800 }, - { 0x54024, 0x16 }, - { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, - { 0x54032, 0x8400 }, - { 0x54033, 0x3300 }, - { 0x54034, 0x6600 }, - { 0x54035, 0x48 }, - { 0x54036, 0x48 }, - { 0x54037, 0x1600 }, - { 0x54038, 0x8400 }, - { 0x54039, 0x3300 }, - { 0x5403a, 0x6600 }, - { 0x5403b, 0x48 }, - { 0x5403c, 0x48 }, - { 0x5403d, 0x1600 }, - { 0xd0000, 0x1 }, -}; - -/* P2 message block parameter for training firmware */ -struct dram_cfg_param ddr_fsp2_cfg2[] = { - { 0xd0000, 0x0 }, - { 0x54002, 0x102 }, - { 0x54003, 0x64 }, - { 0x54004, 0x2 }, - { 0x54005, 0x2228 }, - { 0x54006, 0x14 }, - { 0x54008, 0x121f }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x2 }, - { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, - { 0x54019, 0x84 }, - { 0x5401a, 0x33 }, - { 0x5401b, 0x4866 }, - { 0x5401c, 0x4800 }, - { 0x5401e, 0x16 }, - { 0x5401f, 0x84 }, - { 0x54020, 0x33 }, - { 0x54021, 0x4866 }, - { 0x54022, 0x4800 }, - { 0x54024, 0x16 }, - { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, - { 0x54032, 0x8400 }, - { 0x54033, 0x3300 }, - { 0x54034, 0x6600 }, - { 0x54035, 0x48 }, - { 0x54036, 0x48 }, - { 0x54037, 0x1600 }, - { 0x54038, 0x8400 }, - { 0x54039, 0x3300 }, - { 0x5403a, 0x6600 }, - { 0x5403b, 0x48 }, - { 0x5403c, 0x48 }, - { 0x5403d, 0x1600 }, - { 0xd0000, 0x1 }, -}; - -/* P0 2D message block parameter for training firmware */ -struct dram_cfg_param ddr_fsp0_2d_cfg2[] = { - { 0xd0000, 0x0 }, - { 0x54003, 0xfa0 }, - { 0x54004, 0x2 }, - { 0x54005, 0x2228 }, - { 0x54006, 0x14 }, - { 0x54008, 0x61 }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x2 }, - { 0x5400d, 0x100 }, - { 0x5400f, 0x100 }, - { 0x54010, 0x1f7f }, - { 0x54012, 0x110 }, - { 0x54019, 0x3ff4 }, - { 0x5401a, 0x33 }, - { 0x5401b, 0x4866 }, - { 0x5401c, 0x4800 }, - { 0x5401e, 0x16 }, - { 0x5401f, 0x3ff4 }, - { 0x54020, 0x33 }, - { 0x54021, 0x4866 }, - { 0x54022, 0x4800 }, - { 0x54024, 0x16 }, - { 0x5402b, 0x1000 }, - { 0x5402c, 0x1 }, - { 0x54032, 0xf400 }, - { 0x54033, 0x333f }, - { 0x54034, 0x6600 }, - { 0x54035, 0x48 }, - { 0x54036, 0x48 }, - { 0x54037, 0x1600 }, - { 0x54038, 0xf400 }, - { 0x54039, 0x333f }, - { 0x5403a, 0x6600 }, - { 0x5403b, 0x48 }, - { 0x5403c, 0x48 }, - { 0x5403d, 0x1600 }, - { 0xd0000, 0x1 }, -}; - -struct dram_fsp_msg ddr_dram_fsp_msg2[] = { - { - /* P0 4000mts 1D */ - .drate = 4000, - .fw_type = FW_1D_IMAGE, - .fsp_cfg = ddr_fsp0_cfg2, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg2), - }, - { - /* P1 400mts 1D */ - .drate = 400, - .fw_type = FW_1D_IMAGE, - .fsp_cfg = ddr_fsp1_cfg2, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg2), - }, - { - /* P2 100mts 1D */ - .drate = 100, - .fw_type = FW_1D_IMAGE, - .fsp_cfg = ddr_fsp2_cfg2, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg2), - }, - { - /* P0 4000mts 2D */ - .drate = 4000, - .fw_type = FW_2D_IMAGE, - .fsp_cfg = ddr_fsp0_2d_cfg2, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg2), - }, -}; - -/* quad die, dual rank aka 8 GB DDR timing config params */ +/* ddr timing config params */ struct dram_timing_info dram_timing = { .ddrc_cfg = ddr_ddrc_cfg, .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), @@ -2153,17 +1877,36 @@ struct dram_timing_info dram_timing = { .fsp_table = { 4000, 400, 100, }, }; -/* dual die, single rank aka 1 GB (untested), 2 GB or 4 GB DDR timing config params */ -struct dram_timing_info dram_timing2 = { - .ddrc_cfg = ddr_ddrc_cfg2, - .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg2), - .ddrphy_cfg = ddr_ddrphy_cfg, - .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), - .fsp_msg = ddr_dram_fsp_msg2, - .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg2), - .ddrphy_trained_csr = ddr_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), - .ddrphy_pie = ddr_phy_pie, - .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 4000, 400, 100, }, -}; +static void apply_cfg_patch(struct dram_cfg_param *cfg, int cfg_sz, + struct dram_cfg_param *patch, int patch_sz) +{ + int i, j; + + for (i = 0; i < cfg_sz; i++) + for (j = 0; j < patch_sz; j++) + if (cfg[i].reg == patch[j].reg) + cfg[i].val = patch[j].val; +} + +void lpddr4_single_rank_training_patch(void) +{ + apply_cfg_patch(ddr_ddrc_cfg, ARRAY_SIZE(ddr_ddrc_cfg), + ddr_ddrc_cfg_single_rank_patch, + ARRAY_SIZE(ddr_ddrc_cfg_single_rank_patch)); + + apply_cfg_patch(ddr_fsp0_cfg, ARRAY_SIZE(ddr_fsp0_cfg), + ddr_fsp0_cfg_single_rank_patch, + ARRAY_SIZE(ddr_fsp0_cfg_single_rank_patch)); + + apply_cfg_patch(ddr_fsp1_cfg, ARRAY_SIZE(ddr_fsp1_cfg), + ddr_fsp1_cfg_single_rank_patch, + ARRAY_SIZE(ddr_fsp1_cfg_single_rank_patch)); + + apply_cfg_patch(ddr_fsp2_cfg, ARRAY_SIZE(ddr_fsp2_cfg), + ddr_fsp2_cfg_single_rank_patch, + ARRAY_SIZE(ddr_fsp2_cfg_single_rank_patch)); + + apply_cfg_patch(ddr_fsp0_2d_cfg, ARRAY_SIZE(ddr_fsp0_2d_cfg), + ddr_fsp0_2d_cfg_single_rank_patch, + ARRAY_SIZE(ddr_fsp0_2d_cfg_single_rank_patch)); +} diff --git a/board/toradex/verdin-imx8mp/lpddr4_timing.h b/board/toradex/verdin-imx8mp/lpddr4_timing.h new file mode 100644 index 0000000000..93f3e2fb86 --- /dev/null +++ b/board/toradex/verdin-imx8mp/lpddr4_timing.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright 2022 Toradex + */ + +#ifndef __LPDDR4_TIMING_H__ +#define __LPDDR4_TIMING_H__ + +void lpddr4_single_rank_training_patch(void); + +#endif /* __LPDDR4_TIMING_H__ */ + diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c index 6f1931ffac..b901038e90 100644 --- a/board/toradex/verdin-imx8mp/spl.c +++ b/board/toradex/verdin-imx8mp/spl.c @@ -17,10 +17,11 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <asm/arch/ddr.h> +#include <dm/device.h> +#include <dm/uclass.h> #include <power/pmic.h> #include <power/pca9450.h> - -extern struct dram_timing_info dram_timing2; +#include "lpddr4_timing.h" DECLARE_GLOBAL_DATA_PTR; @@ -32,17 +33,32 @@ int spl_board_boot_device(enum boot_device boot_dev_spl) void spl_dram_init(void) { /* - * try configuring for quad die, dual rank aka 8 GB falling back to - * dual die, single rank aka 1 GB (untested), 2 GB or 4 GB if it fails + * Try configuring for dual rank memory falling back to single rank */ - if (ddr_init(&dram_timing)) { - printf("Quad die, dual rank failed, attempting dual die, single rank configuration.\n"); - ddr_init(&dram_timing2); + if (!ddr_init(&dram_timing)) { + printf("DDR configured as dual rank\n"); + return; + } + + lpddr4_single_rank_training_patch(); + if (!ddr_init(&dram_timing)) { + printf("DDR configured as single rank\n"); + return; } + printf("DDR configuration failed\n"); } void spl_board_init(void) { + if (IS_ENABLED(CONFIG_FSL_CAAM)) { + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); + if (ret) + printf("Failed to initialize caam_jr: %d\n", ret); + } + /* * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does * not allow to change it. Should set the clock after PMIC diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c index 8334c9bb37..e16841c375 100644 --- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c +++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c @@ -18,6 +18,8 @@ #include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <usb.h> +#include <dwc3-uboot.h> #include "../common/tdx-cfg-block.h" @@ -82,6 +84,127 @@ int board_phy_config(struct phy_device *phydev) } #endif +#ifdef CONFIG_USB_DWC3 + +#define USB_PHY_CTRL0 0xF0040 +#define USB_PHY_CTRL0_REF_SSP_EN BIT(2) + +#define USB_PHY_CTRL1 0xF0044 +#define USB_PHY_CTRL1_RESET BIT(0) +#define USB_PHY_CTRL1_COMMONONN BIT(1) +#define USB_PHY_CTRL1_ATERESET BIT(3) +#define USB_PHY_CTRL1_VDATSRCENB0 BIT(19) +#define USB_PHY_CTRL1_VDATDETENB0 BIT(20) + +#define USB_PHY_CTRL2 0xF0048 +#define USB_PHY_CTRL2_TXENABLEN0 BIT(8) + +#define USB_PHY_CTRL6 0xF0058 + +#define HSIO_GPR_BASE (0x32F10000U) +#define HSIO_GPR_REG_0 (HSIO_GPR_BASE) +#define HSIO_GPR_REG_0_USB_CLOCK_MODULE_EN_SHIFT (1) +#define HSIO_GPR_REG_0_USB_CLOCK_MODULE_EN (0x1U << HSIO_GPR_REG_0_USB_CLOCK_MODULE_EN_SHIFT) + +static struct dwc3_device dwc3_device_data = { +#ifdef CONFIG_SPL_BUILD + .maximum_speed = USB_SPEED_HIGH, +#else + .maximum_speed = USB_SPEED_SUPER, +#endif + .base = USB1_BASE_ADDR, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, + .power_down_scale = 2, +}; + +int usb_gadget_handle_interrupts(void) +{ + dwc3_uboot_handle_interrupt(0); + return 0; +} + +static void dwc3_nxp_usb_phy_init(struct dwc3_device *dwc3) +{ + u32 RegData; + + /* enable usb clock via hsio gpr */ + RegData = readl(HSIO_GPR_REG_0); + RegData |= HSIO_GPR_REG_0_USB_CLOCK_MODULE_EN; + writel(RegData, HSIO_GPR_REG_0); + + /* USB3.0 PHY signal fsel for 100M ref */ + RegData = readl(dwc3->base + USB_PHY_CTRL0); + RegData = (RegData & 0xfffff81f) | (0x2a<<5); + writel(RegData, dwc3->base + USB_PHY_CTRL0); + + RegData = readl(dwc3->base + USB_PHY_CTRL6); + RegData &=~0x1; + writel(RegData, dwc3->base + USB_PHY_CTRL6); + + RegData = readl(dwc3->base + USB_PHY_CTRL1); + RegData &= ~(USB_PHY_CTRL1_VDATSRCENB0 | USB_PHY_CTRL1_VDATDETENB0 | + USB_PHY_CTRL1_COMMONONN); + RegData |= USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET; + writel(RegData, dwc3->base + USB_PHY_CTRL1); + + RegData = readl(dwc3->base + USB_PHY_CTRL0); + RegData |= USB_PHY_CTRL0_REF_SSP_EN; + writel(RegData, dwc3->base + USB_PHY_CTRL0); + + RegData = readl(dwc3->base + USB_PHY_CTRL2); + RegData |= USB_PHY_CTRL2_TXENABLEN0; + writel(RegData, dwc3->base + USB_PHY_CTRL2); + + RegData = readl(dwc3->base + USB_PHY_CTRL1); + RegData &= ~(USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET); + writel(RegData, dwc3->base + USB_PHY_CTRL1); +} +#endif + +#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_IMX8M) +#define USB1_PWR_EN IMX_GPIO_NR(1, 12) +#define USB2_PWR_EN IMX_GPIO_NR(1, 14) +int board_usb_init(int index, enum usb_init_type init) +{ + imx8m_usb_power(index, true); + + if (index == 0 && init == USB_INIT_DEVICE) { + dwc3_nxp_usb_phy_init(&dwc3_device_data); + return dwc3_uboot_init(&dwc3_device_data); + } else if (index == 0 && init == USB_INIT_HOST) { + /* Enable GPIO1_IO12 for 5V VBUS */ + gpio_request(USB1_PWR_EN, "usb1_pwr"); + gpio_direction_output(USB1_PWR_EN, 1); + } else if (index == 1 && init == USB_INIT_HOST) { + /* Enable GPIO1_IO14 for 5V VBUS */ + gpio_request(USB2_PWR_EN, "usb2_pwr"); + gpio_direction_output(USB2_PWR_EN, 1); + } + + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + int ret = 0; + if (index == 0 && init == USB_INIT_DEVICE) { + dwc3_uboot_exit(index); + } else if (index == 0 && init == USB_INIT_HOST) { + /* Disable GPIO1_IO12 for 5V VBUS */ + gpio_direction_output(USB1_PWR_EN, 0); + } else if (index == 1 && init == USB_INIT_HOST) { + /* Disable GPIO1_IO14 for 5V VBUS */ + gpio_direction_output(USB2_PWR_EN, 0); + } + + imx8m_usb_power(index, false); + + return ret; +} + +#endif + int board_init(void) { int ret = 0; @@ -92,6 +215,10 @@ int board_init(void) if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) ret = setup_eqos(); +#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_IMX8M) + init_usb_clk(); +#endif + return ret; } @@ -108,7 +235,8 @@ static void select_dt_from_module_version(void) */ is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_WIFI_BT_IT) || (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_2GB_WIFI_BT_IT) || - (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT); + (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT) || + (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT_IT); } if (is_wifi) @@ -119,9 +247,6 @@ static void select_dt_from_module_version(void) if (strcmp(variant, env_variant)) { printf("Setting variant to %s\n", variant); env_set("variant", variant); - - if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) - env_save(); } } @@ -132,9 +257,19 @@ int board_late_init(void) return 0; } +int board_phys_sdram_size(phys_size_t *size) +{ + if (!size) + return -EINVAL; + + *size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE); + + return 0; +} + #if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { - return 0; + return ft_common_board_setup(blob, bd); } #endif diff --git a/common/fdt_support.c b/common/fdt_support.c index ea18ea3f04..f08915c2c6 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -19,6 +19,7 @@ #include <fdt_support.h> #include <exports.h> #include <fdtdec.h> +#include <version.h> /** * fdt_getprop_u32_default_node - Return a node's property or a default @@ -305,6 +306,15 @@ int fdt_chosen(void *fdt) } } + /* add u-boot version */ + err = fdt_setprop(fdt, nodeoffset, "u-boot,version", PLAIN_VERSION, + strlen(PLAIN_VERSION) + 1); + if (err < 0) { + printf("WARNING: could not set u-boot,version %s.\n", + fdt_strerror(err)); + return err; + } + return fdt_fixup_stdout(fdt, nodeoffset); } diff --git a/common/init/board_init.c b/common/init/board_init.c index eab5ee1395..6a55026177 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -78,9 +78,11 @@ __weak void board_init_f_init_stack_protection(void) ulong board_init_f_alloc_reserve(ulong top) { /* Reserve early malloc arena */ +#ifndef CONFIG_MALLOC_F_ADDR #if CONFIG_VAL(SYS_MALLOC_F_LEN) top -= CONFIG_VAL(SYS_MALLOC_F_LEN); #endif +#endif /* LAST : reserve GD (rounded up to a multiple of 16 bytes) */ top = rounddown(top-sizeof(struct global_data), 16); diff --git a/common/spl/spl.c b/common/spl/spl.c index b452d4feeb..c9750ee163 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -20,6 +20,7 @@ #include <serial.h> #include <spl.h> #include <asm/global_data.h> +#include <asm-generic/gpio.h> #include <asm/u-boot.h> #include <nand.h> #include <fat.h> @@ -743,6 +744,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) } } + if (CONFIG_IS_ENABLED(GPIO_HOG)) + gpio_hog_probe_all(); + #if CONFIG_IS_ENABLED(BOARD_INIT) spl_board_init(); #endif diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 9d5a6dccec..1ab201b2f2 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -736,6 +736,9 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, return 0; ctx.fit = spl_load_simple_fit_fix_load(ctx.fit); + if (ctx.fit == NULL) { + return -1; + } ret = spl_simple_fit_parse(&ctx); if (ret < 0) diff --git a/common/usb_hub.c b/common/usb_hub.c index 990993aa2f..f231d711d8 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -166,7 +166,7 @@ static void usb_hub_power_on(struct usb_hub_device *hub) int i; struct usb_device *dev; unsigned pgood_delay = hub->desc.bPwrOn2PwrGood * 2; - const char *env; + const char __maybe_unused *env; dev = hub->pusb_dev; @@ -191,10 +191,12 @@ static void usb_hub_power_on(struct usb_hub_device *hub) * but allow this time to be increased via env variable as some * devices break the spec and require longer warm-up times */ +#if CONFIG_IS_ENABLED(ENV_SUPPORT) env = env_get("usb_pgood_delay"); if (env) pgood_delay = max(pgood_delay, (unsigned)simple_strtol(env, NULL, 0)); +#endif debug("pgood_delay=%dms\n", pgood_delay); /* diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 43215faeb9..8ff0792ccc 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8=y CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=3 CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x89000000 @@ -10,16 +10,25 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis" +CONFIG_BOOTAUX_RESERVED_MEM_BASE=0x88000000 +CONFIG_BOOTAUX_RESERVED_MEM_SIZE=0x08000000 CONFIG_TARGET_APALIS_IMX8=y +CONFIG_IMX_SNVS_SEC_SC=y +CONFIG_IMX_BOOTAUX=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_SYS_LOAD_ADDR=0x95400000 CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTDELAY=1 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-apalis${variant}-${fdt_board}.dtb" CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="Apalis iMX8 # " CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y @@ -30,6 +39,8 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_EXT4_WRITE=y @@ -42,8 +53,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_TSIZE=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_IMX8=y CONFIG_CPU=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82800000 +CONFIG_FASTBOOT_BUF_SIZE=0x08000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_IMX_LPI2C=y @@ -59,6 +77,8 @@ CONFIG_FEC_MXC_SHARE_MDIO=y CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_CDNS3_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX8=y CONFIG_POWER_DOMAIN=y @@ -70,4 +90,15 @@ CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_DM_THERMAL=y CONFIG_IMX_SCU_THERMAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_CI_UDC=y +CONFIG_USB_PORT_AUTO=y +CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER is not set diff --git a/configs/apalis-imx8x_defconfig b/configs/apalis-imx8x_defconfig deleted file mode 100644 index 25da027f7e..0000000000 --- a/configs/apalis-imx8x_defconfig +++ /dev/null @@ -1,80 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_IMX8=y -CONFIG_SYS_TEXT_BASE=0x80020000 -CONFIG_SYS_MALLOC_LEN=0x2800000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_NR_DRAM_BANKS=3 -CONFIG_SYS_MEMTEST_START=0x88000000 -CONFIG_SYS_MEMTEST_END=0x89000000 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0xFFFFDE00 -CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-apalis" -CONFIG_TARGET_APALIS_IMX8X=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x89000000 -CONFIG_FIT=y -CONFIG_OF_SYSTEM_SETUP=y -CONFIG_BOOTDELAY=1 -CONFIG_LOG=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SYS_PROMPT="Apalis iMX8X # " -CONFIG_CMD_CPU=y -# CONFIG_BOOTM_NETBSD is not set -CONFIG_CMD_ASKENV=y -CONFIG_CMD_MEMTEST=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DM=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_UUID=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_VERSION_VARIABLE=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_IP_DEFRAG=y -CONFIG_TFTP_BLOCKSIZE=4096 -CONFIG_TFTP_TSIZE=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_ENV=y -CONFIG_CLK_IMX8=y -CONFIG_CPU=y -CONFIG_MXC_GPIO=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_IMX_LPI2C=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_MISC=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_USDHC=y -CONFIG_PHYLIB=y -CONFIG_PHY_ADDR_ENABLE=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_DM_ETH=y -CONFIG_FEC_MXC_SHARE_MDIO=y -CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 -CONFIG_FEC_MXC=y -CONFIG_MII=y -CONFIG_PCI=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX8=y -CONFIG_POWER_DOMAIN=y -CONFIG_IMX8_POWER_DOMAIN=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_SERIAL=y -CONFIG_FSL_LPUART=y -CONFIG_DM_THERMAL=y -CONFIG_IMX_SCU_THERMAL=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 9645c2f210..e098b1171e 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -12,6 +12,7 @@ CONFIG_TEGRA124=y CONFIG_TARGET_APALIS_TK1=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="setenv fdtfile ${soc}-${fdt_module}-${fdt_board}.dtb && run distro_bootcmd" diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index bd71e4c32a..13fdfca923 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index e7dba8ec6d..e97e08d0cb 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -13,9 +13,10 @@ CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri-emmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 2b9d318f70..1a23c20276 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -14,10 +14,11 @@ CONFIG_TARGET_COLIBRI_IMX6ULL_NAND=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;" CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 04f7f5b0fd..0e69fb3fde 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8=y CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=3 CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x89000000 @@ -10,24 +10,37 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" +CONFIG_BOOTAUX_RESERVED_MEM_BASE=0x88000000 +CONFIG_BOOTAUX_RESERVED_MEM_SIZE=0x08000000 CONFIG_TARGET_COLIBRI_IMX8X=y +CONFIG_IMX_SNVS_SEC_SC=y +CONFIG_IMX_BOOTAUX=y CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x80280000 +CONFIG_SYS_LOAD_ADDR=0x95c00000 CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTDELAY=1 +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb" CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SYS_PROMPT="Colibri iMX8X # " CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_CMD_EXT4_WRITE=y @@ -40,8 +53,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_TSIZE=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_IMX8=y CONFIG_CPU=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82800000 +CONFIG_FASTBOOT_BUF_SIZE=0x08000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_GPIO_HOG=y CONFIG_FXL6408_GPIO=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y @@ -57,6 +77,8 @@ CONFIG_FEC_MXC_SHARE_MDIO=y CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_CDNS3_USB_PHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX8=y CONFIG_POWER_DOMAIN=y @@ -68,4 +90,14 @@ CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_DM_THERMAL=y CONFIG_IMX_SCU_THERMAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_CI_UDC=y +CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER is not set diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 43c3b04e31..e5671773f2 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 52518128e6..84a4b53480 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -13,10 +13,12 @@ CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;" CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb " +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb " # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index e22278a7bc..1214f952c5 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -15,9 +15,10 @@ CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb" +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig deleted file mode 100644 index 0116cfa6f8..0000000000 --- a/configs/colibri_pxa270_defconfig +++ /dev/null @@ -1,52 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_TARGET_COLIBRI_PXA270=y -CONFIG_SYS_TEXT_BASE=0x0 -CONFIG_SYS_MALLOC_LEN=0x20000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 -CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_SYS_LOAD_ADDR=0xa0000000 -CONFIG_TIMESTAMP=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200" -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if fatload mmc 0 0xa0000000 uImage; then bootm 0xa0000000; fi; if usb reset && fatload usb 0 0xa0000000 uImage; then bootm 0xa0000000; fi; bootm 0xc0000;" -CONFIG_SYS_DEVICE_NULLDEV=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DISPLAY_BOARDINFO_LATE=y -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -# CONFIG_SYS_LONGHELP is not set -CONFIG_SYS_PROMPT="$ " -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_EXPORTENV is not set -# CONFIG_CMD_IMPORTENV is not set -CONFIG_CMD_DM=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MMC=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0x80000 -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y -CONFIG_PXA_MMC_GENERIC=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_DM_SERIAL=y -CONFIG_PXA_SERIAL=y -CONFIG_USB=y -# CONFIG_REGEX is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 8cf8a31beb..cebcb53bfb 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -19,7 +19,7 @@ CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;" CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile ${soc}-colibri-${fdt_board}.dtb" +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb" CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index f2da12e92f..2e493daa88 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8M=y CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -18,16 +17,19 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_IMX_BOOTAUX=y +CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_SYS_LOAD_ADDR=0x48200000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y -# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile imx8mm-verdin-${variant}-${fdt_board}.dtb" +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx8mm-verdin-${variant}-${fdt_board}.dtb" CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -38,54 +40,79 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_USB_HOST=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="Verdin iMX8MM # " # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set -# CONFIG_CMD_CRC32 is not set +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MD5SUM=y +CONFIG_MD5SUM_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y +CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SPL_DM=y -CONFIG_SPL_CLK_COMPOSITE_CCF=y -CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_GPIO_HOG=y +CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_SPL_PHY=y +CONFIG_SPL_NOP_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y @@ -93,18 +120,29 @@ CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_PMIC=y CONFIG_SPL_DM_PMIC_PCA9450=y -CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x40400000 CONFIG_IMX_WATCHDOG=y +CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 4c28f7f55e..ae022ec399 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -1,7 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_IMX8M=y CONFIG_SYS_TEXT_BASE=0x40200000 -CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -21,11 +20,12 @@ CONFIG_TARGET_VERDIN_IMX8MP=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_LOAD_ADDR=0x43500000 +CONFIG_SYS_LOAD_ADDR=0x48200000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_VERBOSE=y @@ -34,10 +34,11 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y -CONFIG_PREBOOT="setenv fdtfile imx8mp-verdin-${variant}-${fdt_board}.dtb" +CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx8mp-verdin-${variant}-${fdt_board}.dtb" CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y @@ -53,7 +54,9 @@ CONFIG_SYS_PROMPT="Verdin iMX8MP # " # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_EXPORTENV is not set -# CONFIG_CMD_CRC32 is not set +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MD5SUM=y +CONFIG_MD5SUM_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y CONFIG_CMD_FUSE=y @@ -62,12 +65,15 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y @@ -86,30 +92,44 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y +CONFIG_FSL_CAAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y CONFIG_GPIO_HOG=y +CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y # CONFIG_SPL_DM_I2C is not set CONFIG_SPL_SYS_I2C_LEGACY=y -CONFIG_MISC=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_I2C_EEPROM=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_FSL_USDHC=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_DM_ETH_PHY=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y @@ -120,14 +140,28 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y +CONFIG_IMX_TMU=y CONFIG_USB=y # CONFIG_SPL_DM_USB is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_MX7 is not set +CONFIG_USB_DWC3=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_IMX_WATCHDOG=y +CONFIG_HEXDUMP=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/doc/board/toradex/apalis-imx8x.rst b/doc/board/toradex/apalis-imx8x.rst deleted file mode 100644 index e62578b152..0000000000 --- a/doc/board/toradex/apalis-imx8x.rst +++ /dev/null @@ -1,77 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0+ - -Apalis iMX8X V1.1A Module (SoC NXP i.MX8QXP RevB) -================================================= - -Quick Start ------------ - -- Get and Build the ARM trusted firmware -- Get System Controller firmware -- Get SECO container -- Build U-Boot -- Load U-Boot binary using uuu -- Flash U-Boot binary into the eMMC -- Boot - -Note: builddir is U-Boot build directory (source directory for in-tree builds) - -Get and Build the ARM Trusted Firmware --------------------------------------- - -.. code-block:: bash - - $ cd $(builddir) - $ git clone -b toradex_imx_5.4.70_2.3.0 http://git.toradex.com/cgit/imx-atf.git - $ make PLAT=imx8qx bl31 -C imx-atf - $ cp imx-atf/build/imx8qx/release/bl31.bin $(builddir) - -Get System Controller firmware ---------------------------------------- - -.. code-block:: bash - - $ wget https://github.com/toradex/i.MX-System-Controller-Firmware/raw/master/src/scfw_export_mx8qx_b0/build_mx8qx_b0/mx8qx-apalis-scfw-tcm.bin - -Get SECO container ---------------------------------------- - -.. code-block:: bash - - $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-3.7.4.bin - $ sh imx-seco-3.7.4.bin - $ cp imx-seco-3.7.4/firmware/seco/mx8qxb0-ahab-container.img $(builddir)/mx8qx-ahab-container.img - -Build U-Boot ------------- -.. code-block:: bash - - $ make apalis-imx8x_defconfig - $ make u-boot-dtb.imx - -Load the U-Boot Binary Using UUU --------------------------------- - -Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``: - -https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases - -Put the module into USB recovery aka serial downloader mode, connect USB device -to your host and execute uuu: - -.. code-block:: bash - - sudo ./uuu $(builddir)/u-boot-dtb.imx - -Flash the U-Boot Binary into the eMMC -------------------------------------- - -Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area -partition and boot: - -.. code-block:: bash - - load mmc 1:1 $loadaddr u-boot-dtb.imx - setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 - mmc dev 0 1 - mmc write ${loadaddr} 0x0 ${blkcnt} diff --git a/doc/board/toradex/index.rst b/doc/board/toradex/index.rst index 1cd926a730..ead5efbb95 100644 --- a/doc/board/toradex/index.rst +++ b/doc/board/toradex/index.rst @@ -7,7 +7,6 @@ Toradex :maxdepth: 2 apalis-imx8 - apalis-imx8x colibri_imx7 colibri-imx8x verdin-imx8mm diff --git a/doc/imx/habv4/csf_examples/mx8m/csf_fit.txt b/doc/imx/habv4/csf_examples/mx8m/csf_fit.txt index d9218ab431..ca91f1232a 100644 --- a/doc/imx/habv4/csf_examples/mx8m/csf_fit.txt +++ b/doc/imx/habv4/csf_examples/mx8m/csf_fit.txt @@ -30,7 +30,7 @@ Verification index = 2 # Authenticate Start Address, Offset, Length and file Blocks = 0x401fcdc0 0x057c00 0x01020 "flash.bin", \ - 0x40200000 0x05AC00 0x9AAC8 "flash.bin", \ - 0x00910000 0x0F56C8 0x09139 "flash.bin", \ - 0xFE000000 0x0FE804 0x4D268 "flash.bin", \ - 0x4029AAC8 0x14BA6C 0x06DCF "flash.bin" + 0x40200000 0x05CC00 0x9AAC8 "flash.bin", \ + 0x00910000 0x0F76C8 0x09139 "flash.bin", \ + 0xFE000000 0x100804 0x4D268 "flash.bin", \ + 0x4029AAC8 0x14DA6C 0x06DCF "flash.bin" diff --git a/doc/imx/habv4/csf_examples/mx8m/csf_fit_enc.txt b/doc/imx/habv4/csf_examples/mx8m/csf_fit_enc.txt index be0b353084..55dcd1d6ce 100644 --- a/doc/imx/habv4/csf_examples/mx8m/csf_fit_enc.txt +++ b/doc/imx/habv4/csf_examples/mx8m/csf_fit_enc.txt @@ -44,6 +44,6 @@ # is a copy of the file used for the authentication command above Verification Index = 0 Mac Bytes = 16 - Blocks = 0x40200000 0x5AC00 0xB8940 "flash-spl-fit-enc.bin", \ - 0x920000 0x113540 0xA160 "flash-spl-fit-enc.bin", \ - 0xBE000000 0x11D6A0 0x48520 "flash-spl-fit-enc.bin" + Blocks = 0x40200000 0x5CC00 0xB8940 "flash-spl-fit-enc.bin", \ + 0x920000 0x115540 0xA160 "flash-spl-fit-enc.bin", \ + 0xBE000000 0x11F6A0 0x48520 "flash-spl-fit-enc.bin" diff --git a/doc/imx/habv4/csf_examples/mx8m/csf_fit_fdt.txt b/doc/imx/habv4/csf_examples/mx8m/csf_fit_fdt.txt new file mode 100644 index 0000000000..dd88843dee --- /dev/null +++ b/doc/imx/habv4/csf_examples/mx8m/csf_fit_fdt.txt @@ -0,0 +1,32 @@ +[Header] + Version = 4.3 + Hash Algorithm = sha256 + Engine = CAAM + Engine Configuration = 0 + Certificate Format = X509 + Signature Format = CMS + +[Install SRK] + # Index of the key location in the SRK table to be installed + File = "../crts/SRK_1_2_3_4_table.bin" + Source index = 0 + +[Install CSFK] + # Key used to authenticate the CSF data + File = "../crts/CSF1_1_sha256_2048_65537_v3_usr_crt.pem" + +[Authenticate CSF] + +[Install Key] + # Key slot index used to authenticate the key to be installed + Verification index = 0 + # Target key slot in HAB key store where key will be installed + Target index = 2 + # Key to install + File = "../crts/IMG1_1_sha256_2048_65537_v3_usr_crt.pem" + +[Authenticate Data] + # Key slot index used to authenticate the image data + Verification index = 2 + # Authenticate Start Address, Offset, Length and file + Blocks = 0x401fadc0 0x57c00 0x3020 "signed-flash.bin" diff --git a/doc/imx/habv4/csf_examples/mx8m/csf_fit_sign_enc.txt b/doc/imx/habv4/csf_examples/mx8m/csf_fit_sign_enc.txt index 9a41c8bb40..b699b4dbf3 100644 --- a/doc/imx/habv4/csf_examples/mx8m/csf_fit_sign_enc.txt +++ b/doc/imx/habv4/csf_examples/mx8m/csf_fit_sign_enc.txt @@ -27,9 +27,9 @@ [Authenticate Data] Verification index = 2 Blocks = 0x401fcdc0 0x57c00 0x1020 "flash-spl-fit-enc.bin", \ - 0x40200000 0x5AC00 0xB8940 "flash-spl-fit-enc.bin", \ - 0x920000 0x113540 0xA160 "flash-spl-fit-enc.bin", \ - 0xBE000000 0x11D6A0 0x48520 "flash-spl-fit-enc.bin" + 0x40200000 0x5CC00 0xB8940 "flash-spl-fit-enc.bin", \ + 0x920000 0x115540 0xA160 "flash-spl-fit-enc.bin", \ + 0xBE000000 0x11F6A0 0x48520 "flash-spl-fit-enc.bin" [Install Secret Key] # Install the blob @@ -47,7 +47,7 @@ # is a copy of the file used for the authentication command above Verification Index = 0 Mac Bytes = 16 - Blocks = 0x40200000 0x5AC00 0xB8940 "flash-spl-fit-enc-dummy.bin", \ - 0x920000 0x113540 0xA160 "flash-spl-fit-enc-dummy.bin", \ - 0xBE000000 0x11D6A0 0x48520 "flash-spl-fit-enc-dummy.bin" + Blocks = 0x40200000 0x5CC00 0xB8940 "flash-spl-fit-enc-dummy.bin", \ + 0x920000 0x115540 0xA160 "flash-spl-fit-enc-dummy.bin", \ + 0xBE000000 0x11F6A0 0x48520 "flash-spl-fit-enc-dummy.bin" diff --git a/doc/imx/habv4/guides/mx8m_encrypted_boot.txt b/doc/imx/habv4/guides/mx8m_encrypted_boot.txt index bb9b6b80f0..5a5f2bd835 100644 --- a/doc/imx/habv4/guides/mx8m_encrypted_boot.txt +++ b/doc/imx/habv4/guides/mx8m_encrypted_boot.txt @@ -41,19 +41,25 @@ The diagram below illustrates an encrypted flash.bin image layout: Signed | ------- +-----------------------------+ | Data | Enc ^ | u-boot-spl.bin | | | Data | | + | | SPL - v v | DDR FW | | Image + | | | DDR FW | | Image + | | | + | | + v v | Hash of FIT FDT | | ------------------ +-----------------------------+ | | CSF - SPL + DDR FW | v +-----------------------------+ -------- | DEK Blob | +-----------------------------+ | Padding | - ------- +-----------------------------+ -------- - Signed ^ | FDT - FIT | ^ - Data | +-----------------------------+ | - v | IVT - FIT | | - ------- +-----------------------------+ | - | CSF - FIT | | + ------------------ +-----------------------------+ -------- + ^ Signed ^ | FDT - FIT | ^ + | Data | +-----------------------------+ | + Signed | v | IVT - FIT | | + Data | ------- +-----------------------------+ | +(optional) | CSF - FIT | | + | +-----------------------------+ | + v | IVT - FIT FDT (optional) | | + ------------------ +-----------------------------+ | + | CSF - FIT FDT (optional) | | ------------------ +-----------------------------+ | ^ | u-boot-nodtb.bin | | FIT | +-----------------------------+ | Image @@ -81,6 +87,7 @@ by following one of the methods below: CONFIG_CMD_DEKBLOB=y CONFIG_IMX_OPTEE_DEK_ENCAP=y CONFIG_CMD_PRIBLOB=y + CONFIG_IMX_SPL_FIT_FDT_SIGNATURE=y (Optional, for FIT FDT signature only) - Kconfig @@ -166,7 +173,9 @@ Command Sequence File (CSF): Second Loader IMAGE: sld_header_off 0x57c00 sld_csf_off 0x58c20 - sld hab block: 0x401fcdc0 0x57c00 0x1020 + sld hab block: 0x401fadc0 0x57c00 0x1020 + fit-fdt csf_off 0x5ac20 + fit-fdt hab block: 0x401fadc0 0x57c00 0x3020 - Additional HAB information is provided by running the following command: @@ -176,10 +185,10 @@ Command Sequence File (CSF): ./../scripts/pad_image.sh u-boot-nodtb.bin fsl-imx8mm-evk.dtb TEE_LOAD_ADDR=0xbe000000 ATF_LOAD_ADDR=0x00920000 VERSION=v1 \ ./print_fit_hab.sh 0x60000 fsl-imx8mm-evk.dtb - 0x40200000 0x5AC00 0xB0318 - 0x402B0318 0x10AF18 0x8628 - 0x920000 0x113540 0xA160 - 0xBE000000 0x11D6A0 0x48520 + 0x40200000 0x5CC00 0xB0318 + 0x402B0318 0x10CF18 0x8628 + 0x920000 0x115540 0xA160 + 0xBE000000 0x11F6A0 0x48520 1.6 Creating the CSF description file for SPL + DDR FW image ------------------------------------------------------------- @@ -332,7 +341,7 @@ file. [Authenticate Data] ... - Blocks = 0x401FCDC0 0x57C00 0x1020 "flash-spl-enc.bin" + Blocks = 0x401FADC0 0x57C00 0x1020 "flash-spl-enc.bin" - Add the Install Secret Key command to generate the dek_fit.bin file and install the blob. The Blob Address is a fixed address defined in imx-mkimage @@ -356,10 +365,10 @@ file. imx-mkimage output: - 0x40200000 0x5AC00 0xB0318 ──┬── Total length = 0xB0318 + 0x8628 = 0xB8940 - 0x402B0318 0x10AF18 0x8628 ──┘ - 0x920000 0x113540 0xA160 - 0xBE000000 0x11D6A0 0x48520 + 0x40200000 0x5CC00 0xB0318 ──┬── Total length = 0xB0318 + 0x8628 = 0xB8940 + 0x402B0318 0x10CF18 0x8628 ──┘ + 0x920000 0x115540 0xA160 + 0xBE000000 0x11F6A0 0x48520 Decrypt data in csf_fit_enc.txt: @@ -367,9 +376,9 @@ file. [Decrypt Data] ... - Blocks = 0x40200000 0x5AC00 0xB8940 "flash-spl-fit-enc.bin", \ - 0x920000 0x113540 0xA160 "flash-spl-fit-enc.bin", \ - 0xBE000000 0x11D6A0 0x48520 "flash-spl-fit-enc.bin" + Blocks = 0x40200000 0x5CC00 0xB8940 "flash-spl-fit-enc.bin", \ + 0x920000 0x115540 0xA160 "flash-spl-fit-enc.bin", \ + 0xBE000000 0x11F6A0 0x48520 "flash-spl-fit-enc.bin" 1.8.2 csf_fit_sign_enc.txt --------------------------- @@ -384,10 +393,10 @@ The second CSF is used to sign the encrypted FIT image previously generated [Authenticate Data] ... - Blocks = 0x401fcdc0 0x57c00 0x1020 "flash-spl-fit-enc.bin" - 0x40200000 0x5AC00 0xB8940 "flash-spl-fit-enc.bin", \ - 0x920000 0x113540 0xA160 "flash-spl-fit-enc.bin", \ - 0xBE000000 0x11D6A0 0x48520 "flash-spl-fit-enc.bin" + Blocks = 0x401fadc0 0x57c00 0x1020 "flash-spl-fit-enc.bin" + 0x40200000 0x5CC00 0xB8940 "flash-spl-fit-enc.bin", \ + 0x920000 0x115540 0xA160 "flash-spl-fit-enc.bin", \ + 0xBE000000 0x11F6A0 0x48520 "flash-spl-fit-enc.bin" - Add the Install Secret Key command to generate a dummy DEK blob file, @@ -408,9 +417,28 @@ The second CSF is used to sign the encrypted FIT image previously generated [Decrypt Data] ... - Blocks = 0x40200000 0x5AC00 0xB8940 "flash-spl-fit-enc-dummy.bin", \ - 0x920000 0x113540 0xA160"flash-spl-fit-enc-dummy.bin", \ - 0xBE000000 0x11D6A0 0x48520 "flash-spl-fit-enc-dummy.bin" + Blocks = 0x40200000 0x5CC00 0xB8940 "flash-spl-fit-enc-dummy.bin", \ + 0x920000 0x115540 0xA160"flash-spl-fit-enc-dummy.bin", \ + 0xBE000000 0x11F6A0 0x48520 "flash-spl-fit-enc-dummy.bin" + +1.8.3 (Optional) csf_fit_fdt.txt +--------------------------- + +When optional FIT FDT signature is used, user needs third CSF to sign encrypted-flash.bin +generated by 1.11.2. Because FIT FDT structure is not encrypted, so this step will not +encrypt any data. + +- FIT FDT signature "Authenticate Data" addresses in flash.bin build log: + + fit-fdt hab block: 0x401fadc0 0x57c00 0x3020 + +- "Authenticate Data" command in csf_fit_fdt.txt file: + + For example: + + [Authenticate Data] + ... + Blocks = 0x401fadc0 0x57c00 0x3020 "encrypted-flash.bin" 1.9 Encrypting and signing the FIT image ----------------------------------------- @@ -503,6 +531,10 @@ The CSF offsets can be obtained from the flash.bin build log: sld_csf_off 0x58c20 +- (Optional) FIT FDT CSF offset: + + fit-fdt csf_off 0x5ac20 + The encrypted flash.bin image can be then assembled: - Create a flash-spl-fit-enc.bin copy: @@ -539,7 +571,21 @@ The encrypted flash.bin image can be then assembled: $ dd if=dek_fit_blob.bin of=encrypted-flash.bin seek=$((0x165BC0)) bs=1 conv=notrunc -1.11.3 Flash encrypted boot image +1.11.3 (Optional) Create and Insert FIT FDT CSF +----------------------------------- + +If FIT FDT signature is used, users need to continue sign the encrypted-flash.bin +with csf_fit_fdt.txt CSF file + +- Create FIT FDT CSF binary file + + $ ./cst -i csf_fit_fdt.txt -o csf_fit_fdt.bin + +- Insert csf_fit_fdt.bin in encrypted-flash.bin at 0x5ac20 offset: + + $ dd if=csf_fit_fdt.bin of=encrypted-flash.bin seek=$((0x5ac20)) bs=1 conv=notrunc + +1.11.4 Flash encrypted boot image ----------------------------------- - Flash encrypted image in SDCard: diff --git a/doc/imx/habv4/guides/mx8m_secure_boot.txt b/doc/imx/habv4/guides/mx8m_secure_boot.txt index dbc8bcd1d5..8a6ac62dac 100644 --- a/doc/imx/habv4/guides/mx8m_secure_boot.txt +++ b/doc/imx/habv4/guides/mx8m_secure_boot.txt @@ -39,17 +39,23 @@ file are covered by a digital signature. Signed | +-----------------------------+ | Data | | u-boot-spl.bin | | | | + | | SPL - v | DDR FW | | Image + | | DDR FW | | Image + | | + | | + v | Hash of FIT FDT | | ------- +-----------------------------+ | | CSF - SPL + DDR FW | v +-----------------------------+ -------- | Padding | - ------- +-----------------------------+ -------- - Signed ^ | FDT - FIT | ^ - Data | +-----------------------------+ | - v | IVT - FIT | | - ------- +-----------------------------+ | - | CSF - FIT | | + ----------------- +-----------------------------+ -------- + ^ Signed ^ | FDT - FIT | ^ + | Data | +-----------------------------+ | + | v | IVT - FIT | | + Signed | -------+-----------------------------+ | + Data | | CSF - FIT | | +(optional) +-----------------------------+ | + v | IVT - FIT FDT (optional) | | + ----------------- +-----------------------------+ | + | CSF - FIT FDT (optional) | | ------- +-----------------------------+ | FIT ^ | u-boot-nodtb.bin | | Image | +-----------------------------+ | @@ -124,6 +130,17 @@ to extend the root of trust, authenticating the U-Boot, ARM trusted firmware The root of trust can be extended again at U-Boot level to authenticate Kernel and M4 images. +Note: +FIT uses a FDT structure to describe the images loading information. In SPL image, +the Hash of the FIT FDT structure is appended after DDR firmware. By default, +SPL will verify the Hash before parsing the FIT FDT structure to load images. +It means SPL image having to bind with FIT image. Users who need to decouple SPL +image with FIT image, for example upgrading FIT image individually, could use +optional FIT FDT signature. The FIT FDT signature approach generates another +signature to FIT image, see the IVT - FIT FDT (optional) and CSF - FIT FDT (optional) +in the signed flash.bin image layout. SPL will authenticate the FIT FDT structure +before parsing it to load images. + 1.2 Enabling the secure boot support in U-Boot ----------------------------------------------- @@ -138,6 +155,7 @@ configuration: - Defconfig: CONFIG_IMX_HAB=y + CONFIG_IMX_SPL_FIT_FDT_SIGNATURE=y (Optional, for FIT FDT signature only) - Kconfig: @@ -204,9 +222,11 @@ parameters and CSF offsets: spl hab block: 0x7e0fd0 0x1a000 0x2e600 Second Loader IMAGE: - sld_header_off 0x57c00 - sld_csf_off 0x58c20 - sld hab block: 0x401fcdc0 0x57c00 0x1020 + sld_header_off 0x57c00 + sld_csf_off 0x58c20 + sld hab block: 0x401fadc0 0x57c00 0x1020 + fit-fdt csf_off 0x5ac20 + fit-fdt hab block: 0x401fadc0 0x57c00 0x3020 Additional HAB information is provided by running the following command: @@ -216,10 +236,10 @@ Additional HAB information is provided by running the following command: TEE_LOAD_ADDR=0xfe000000 ATF_LOAD_ADDR=0x00910000 ./print_fit_hab.sh \ 0x60000 fsl-imx8mq-evk.dtb - 0x40200000 0x5AC00 0x9AAC8 - 0x910000 0xF56C8 0x9139 - 0xFE000000 0xFE804 0x4D268 - 0x4029AAC8 0x14BA6C 0x6DCF + 0x40200000 0x5CC00 0x9AAC8 + 0x910000 0xF76C8 0x9139 + 0xFE000000 0x100804 0x4D268 + 0x4029AAC8 0x14DA6C 0x6DCF If problems are encountered while using mkimage, please refer to the Linux User Guide which can be found alongside the latest Linux BSP release. @@ -238,7 +258,7 @@ this document. Please refer to introduction_habv4.txt for keys, certificates, SRK table, and SRK hash generation. The resulting file locations should be inserted into the CSF files like this: -- Insertion into both csf_spl.txt and csf_fit.txt +- Insertion into both csf_spl.txt, csf_fit.txt, and csf_fit_fdt.txt (optional) For Example: @@ -281,10 +301,10 @@ needed again for binary insertion. - FIT image "Authenticate Data" addresses in print_fit_hab build log: - 0x40200000 0x5AC00 0x9AAC8 - 0x910000 0xF56C8 0x9139 - 0xFE000000 0xFE804 0x4D268 - 0x4029AAC8 0x14BA6C 0x6DCF + 0x40200000 0x5CC00 0x9AAC8 + 0x910000 0xF76C8 0x9139 + 0xFE000000 0x100804 0x4D268 + 0x4029AAC8 0x14DA6C 0x6DCF - "Authenticate Data" command in csf_fit.txt file: @@ -292,11 +312,23 @@ needed again for binary insertion. [Authenticate Data] ... - Blocks = 0x401fcdc0 0x057c00 0x01020 "flash.bin", \ - 0x40200000 0x05AC00 0x9AAC8 "flash.bin", \ - 0x00910000 0x0F56C8 0x09139 "flash.bin", \ - 0xFE000000 0x0FE804 0x4D268 "flash.bin", \ - 0x4029AAC8 0x14BA6C 0x06DCF "flash.bin" + Blocks = 0x401fadc0 0x057c00 0x1020 "flash.bin", \ + 0x40200000 0x05CC00 0x9AAC8 "flash.bin", \ + 0x00910000 0x0F76C8 0x09139 "flash.bin", \ + 0xFE000000 0x100804 0x4D268 "flash.bin", \ + 0x4029AAC8 0x14DA6C 0x06DCF "flash.bin" + +- (Optional) FIT FDT signature "Authenticate Data" addresses in flash.bin build log: + + fit-fdt hab block: 0x401fadc0 0x57c00 0x3020 + +- (Optional) "Authenticate Data" command in csf_fit_fdt.txt file: + + For example: + + [Authenticate Data] + ... + Blocks = 0x401fadc0 0x57c00 0x3020 "signed-flash.bin" 1.4.1 Avoiding Kernel crash in closed devices ---------------------------------------------- @@ -352,6 +384,10 @@ The CSF offsets can be obtained from the flash.bin build log: sld_csf_off 0x58c20 +- (Optional) FIT FDT CSF offset: + + fit-fdt csf_off 0x5ac20 + The signed flash.bin image can be then assembled: - Create a flash.bin copy: @@ -366,6 +402,17 @@ The signed flash.bin image can be then assembled: $ dd if=csf_fit.bin of=signed_flash.bin seek=$((0x58c20)) bs=1 conv=notrunc +(Optional) If FIT FDT signature is used, users need to continue sign the signed_flash.bin +with csf_fit_fdt.txt CSF file + +- (Optional) Create FIT FDT CSF binary file (must after signed_flash.bin is generated): + + $ ./cst -i csf_fit_fdt.txt -o csf_fit_fdt.bin + +- (Optional) Insert csf_fit_fdt.bin in signed_flash.bin at 0x5ac20 offset: + + $ dd if=csf_fit_fdt.bin of=signed_flash.bin seek=$((0x5ac20)) bs=1 conv=notrunc + - Flash signed flash.bin image: $ sudo dd if=signed_flash.bin of=/dev/sd<x> bs=1K seek=33 && sync diff --git a/drivers/fastboot/fb_fsl/fb_fsl_common.c b/drivers/fastboot/fb_fsl/fb_fsl_common.c index b17c25a55a..47e2974daa 100644 --- a/drivers/fastboot/fb_fsl/fb_fsl_common.c +++ b/drivers/fastboot/fb_fsl/fb_fsl_common.c @@ -368,14 +368,6 @@ static int _fastboot_setup_dev(int *switched) void fastboot_setup(void) { int sw, ret; - struct tag_serialnr serialnr; - char serial[17]; - - if (!env_get("serial#")) { - get_board_serial(&serialnr); - sprintf(serial, "%08x%08x", serialnr.high, serialnr.low); - env_set("serial#", serial); - } /*execute board relevant initilizations for preparing fastboot */ board_fastboot_setup(); diff --git a/drivers/fastboot/fb_fsl/fb_fsl_getvar.c b/drivers/fastboot/fb_fsl/fb_fsl_getvar.c index 49caf3d7eb..ec96911c0b 100644 --- a/drivers/fastboot/fb_fsl/fb_fsl_getvar.c +++ b/drivers/fastboot/fb_fsl/fb_fsl_getvar.c @@ -118,7 +118,9 @@ static bool is_slotvar(char *cmd) return false; } +#if defined(CONFIG_SERIAL_TAG) || defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) static char serial[IMX_SERIAL_LEN]; +#endif char *get_serial(void) { diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8ff3070c4e..d93d3eded1 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -57,6 +57,15 @@ config GPIO_HOG is a mechanism providing automatic GPIO request and config- uration as part of the gpio-controller's driver probe function. +config SPL_GPIO_HOG + bool "Enable GPIO hog support in SPL" + depends on SPL_GPIO + help + Enable gpio hog support in SPL + The GPIO chip may contain GPIO hog definitions. GPIO hogging + is a mechanism providing automatic GPIO request and config- + uration as part of the gpio-controller's driver probe function. + config DM_GPIO_LOOKUP_LABEL bool "Enable searching for gpio labelnames" depends on DM_GPIO diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 125ae53d61..9075c7235d 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -1432,9 +1432,6 @@ void devm_gpiod_put(struct udevice *dev, struct gpio_desc *desc) static int gpio_post_bind(struct udevice *dev) { - struct udevice *child; - ofnode node; - #if defined(CONFIG_NEEDS_MANUAL_RELOC) struct dm_gpio_ops *ops = (struct dm_gpio_ops *)device_get_ops(dev); static int reloc_done; @@ -1465,7 +1462,10 @@ static int gpio_post_bind(struct udevice *dev) } #endif - if (CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_GPIO_HOG)) { + if (CONFIG_IS_ENABLED(GPIO_HOG)) { + struct udevice *child; + ofnode node; + dev_for_each_subnode(node, dev) { if (ofnode_read_bool(node, "gpio-hog")) { const char *name = ofnode_get_name(node); diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index ad48a13170..baea2a0799 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -42,6 +42,7 @@ #include <net.h> #include <netdev.h> #include <phy.h> +#include <power/regulator.h> #include <reset.h> #include <wait_bit.h> #include <asm/cache.h> @@ -310,6 +311,7 @@ struct eqos_priv { struct clk clk_slave_bus; struct mii_dev *mii; struct phy_device *phy; + struct udevice *phy_supply; ofnode phy_of_node; u32 max_speed; void *descs; @@ -1657,6 +1659,16 @@ static int eqos_probe_resources_core(struct udevice *dev) eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf, EQOS_MAX_PACKET_SIZE * EQOS_DESCRIPTORS_RX); +#ifdef CONFIG_DM_REGULATOR + if (eqos->phy_supply) { + ret = regulator_set_enable(eqos->phy_supply, true); + if (ret) { + printf("%s: Error enabling phy supply\n", dev->name); + goto err_free_rx_dma_buf; + } + } +#endif + debug("%s: OK\n", __func__); return 0; @@ -1678,6 +1690,11 @@ static int eqos_remove_resources_core(struct udevice *dev) debug("%s(dev=%p):\n", __func__, dev); +#ifdef CONFIG_DM_REGULATOR + if (eqos->phy_supply) + regulator_set_enable(eqos->phy_supply, false); +#endif + free(eqos->rx_pkt); free(eqos->rx_dma_buf); free(eqos->tx_dma_buf); @@ -1982,6 +1999,10 @@ static int eqos_probe(struct udevice *dev) eqos->dma_regs = (void *)(eqos->regs + EQOS_DMA_REGS_BASE); eqos->tegra186_regs = (void *)(eqos->regs + EQOS_TEGRA186_REGS_BASE); +#ifdef CONFIG_DM_REGULATOR + device_get_supply_regulator(dev, "phy-supply", &eqos->phy_supply); +#endif + ret = eqos_probe_resources_core(dev); if (ret < 0) { pr_err("eqos_probe_resources_core() failed: %d", ret); diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 2bae39347d..37b5b6c4d8 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -1357,21 +1357,22 @@ static int ci_udc_otg_clk_init(struct udevice *dev, return 0; } -static int ci_udc_otg_phy_mode(struct udevice *dev) +int __weak board_ci_udc_phy_mode(void *__iomem phy_base, int phy_off) { - struct ci_udc_priv_data *priv = dev_get_priv(dev); - void *__iomem phy_ctrl, *__iomem phy_status; - void *__iomem phy_base = (void *__iomem)devfdt_get_addr(&priv->otgdev); u32 val; if (is_mx6() || is_mx7ulp() || is_imx8() || is_imx8ulp()) { + printf("We are in is_imx8\n"); phy_base = (void __iomem *)fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, - priv->phy_off, + phy_off, "reg", 0, NULL, false); - if ((fdt_addr_t)phy_base == FDT_ADDR_T_NONE) + if ((fdt_addr_t)phy_base == FDT_ADDR_T_NONE) { + printf("(fdt_addr_t)phy_base == fdt_addr_t_none)\n"); return -EINVAL; + } + printf("Getting phy ctrl\n"); phy_ctrl = (void __iomem *)(phy_base + USBPHY_CTRL); val = readl(phy_ctrl); if (val & USBPHY_CTRL_OTG_ID) @@ -1391,6 +1392,15 @@ static int ci_udc_otg_phy_mode(struct udevice *dev) } } + +static int ci_udc_otg_phy_mode(struct udevice *dev) +{ + struct ci_udc_priv_data *priv = dev_get_priv(dev); + + void *__iomem phy_base = (void *__iomem)devfdt_get_addr(&priv->otgdev); + return board_ci_udc_phy_mode(phy_base, priv->phy_off); +} + static int ci_udc_otg_ofdata_to_platdata(struct udevice *dev) { struct ci_udc_priv_data *priv = dev_get_priv(dev); diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index c87bcd475e..1d05bcae99 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -1,6 +1,6 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * Copyright 2019-2021 Toradex + * Copyright 2019-2022 Toradex */ #ifndef __APALIS_IMX8_H @@ -9,66 +9,57 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define USDHC1_BASE_ADDR 0x5b010000 -#define USDHC2_BASE_ADDR 0x5b020000 - /* Networking */ #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x84000000\0" \ - "kernel_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x94400000\0" \ - "scriptaddr=0x87000000\0" + "fdt_addr_r=0x9d400000\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_comp_addr_r=0xf0000000\0" \ + "kernel_comp_size=0x08000000\0" \ + "ramdisk_addr_r=0x9d500000\0" \ + "scriptaddr=0x9d480000\0" + +/* Boot M4 */ +#define M4_BOOT_ENV \ + "m4_0_image=m4_0.bin\0" \ + "m4_1_image=m4_1.bin\0" \ + "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ + "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ + "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ + "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ +/* Enable Distro Boot */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(MMC, mmc, 0) \ + func(USB, usb, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#undef BOOTENV_RUN_NET_USB_START -#define BOOTENV_RUN_NET_USB_START "" /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ + M4_BOOT_ENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_file=Image\0" \ - "console=ttyLP1 earlycon\0" \ - "fdt_addr=0x83000000\0" \ - "fdt_file=fsl-imx8qm-apalis-eval.dtb\0" \ - "fdtfile=fsl-imx8qm-apalis-eval.dtb\0" \ - "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ + "boot_script_dhcp=boot.scr\0" \ + "console=ttyLP1\0" \ + "fdt_board=eval\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=PARTUUID=${uuid} rootwait " \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ - "\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; tftp ${fdt_addr} " \ - "apalis-imx8/${fdt_file}; booti ${loadaddr} - ${fdt_addr}\0" \ - "panel=NULL\0" \ - "script=boot.scr\0" \ - "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ + "consoleblank=0 earlycon\0" \ + "update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \ "${blkcnt}; fi\0" -/* Link Definitions */ - #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -/* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 @@ -87,4 +78,18 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 8000000 /* 8MHz */ +/* USB Config */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_USBD_HS +#endif + +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +/* USB OTG controller configs */ +#ifdef CONFIG_USB_EHCI_HCD +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif + #endif /* __APALIS_IMX8_H */ diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h deleted file mode 100644 index 8a6f294ae8..0000000000 --- a/include/configs/apalis-imx8x.h +++ /dev/null @@ -1,129 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2020 Toradex - */ - -#ifndef __APALIS_IMX8X_H -#define __APALIS_IMX8X_H - -#include <asm/arch/imx-regs.h> -#include <linux/sizes.h> -#include <linux/stringify.h> - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define USDHC1_BASE_ADDR 0x5b010000 -#define USDHC2_BASE_ADDR 0x5b020000 - -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - -#define MEM_LAYOUT_ENV_SETTINGS \ - "kernel_addr_r=0x80280000\0" \ - "fdt_addr_r=0x83100000\0" \ - "ramdisk_addr_r=0x8a000000\0" \ - "scriptaddr=0x83200000\0" - -#ifdef CONFIG_AHAB_BOOT -#define AHAB_ENV "sec_boot=yes\0" -#else -#define AHAB_ENV "sec_boot=no\0" -#endif - -/* Boot M4 */ -#define M4_BOOT_ENV \ - "m4_0_image=m4_0.bin\0" \ - "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ - "${m4_0_image}\0" \ - "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ - -#define MFG_NAND_PARTITION "" - -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(DHCP, dhcp, na) -#include <config_distro_bootcmd.h> -#undef BOOTENV_RUN_NET_USB_START -#define BOOTENV_RUN_NET_USB_START "" - -#define CONFIG_MFG_ENV_SETTINGS \ - "mfgtool_args=setenv bootargs ${consoleargs} " \ - "rdinit=/linuxrc g_mass_storage.stall=0 " \ - "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \ - "g_mass_storage.idProduct=0x37FF " \ - "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \ - "${vidargs} clk_ignore_unused\0" \ - "initrd_addr=0x83800000\0" \ - "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \ - "${fdt_addr};\0" \ - -/* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - AHAB_ENV \ - BOOTENV \ - CONFIG_MFG_ENV_SETTINGS \ - M4_BOOT_ENV \ - MEM_LAYOUT_ENV_SETTINGS \ - "boot_file=Image\0" \ - "consoleargs=console=ttyLP3,${baudrate} earlycon\0" \ - "fdt_file=imx8qxp-apalis-eval.dtb\0" \ - "fdtfile=imx8qxp-apalis-eval.dtb\0" \ - "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ - "image=Image\0" \ - "initrd_addr=0x83800000\0" \ - "mmcargs=setenv bootargs ${consoleargs} " \ - "root=PARTUUID=${uuid} rootwait " \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "netargs=setenv bootargs ${consoleargs} " \ - "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ - "${vidargs}\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ - "apalis-imx8x/${fdt_file}; booti ${loadaddr} - " \ - "${fdt_addr}\0" \ - "panel=NULL\0" \ - "script=boot.scr\0" \ - "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ - "if test \"$confirm\" = \"y\"; then " \ - "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ - "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \ - "${blkcnt}; fi\0" \ - "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0" - -/* Link Definitions */ - -#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 - -/* Environment in eMMC, before config block at the end of 1st "boot sector" */ - -/* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 - -#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define PHYS_SDRAM_1 0x80000000 -#define PHYS_SDRAM_2 0x880000000 -#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ - -/* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE SZ_2K -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - -/* Networking */ -#define CONFIG_FEC_ENET_DEV 0 -#define IMX_FEC_BASE 0x5b040000 -#define CONFIG_FEC_MXC_PHYADDR 0x4 -#define CONFIG_ETHPRIME "eth0" -#define CONFIG_FEC_XCV_TYPE RGMII -#define PHY_ANEG_TIMEOUT 20000 - -#endif /* __APALIS_IMX8X_H */ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 57192649ec..178a219e7c 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -59,18 +59,9 @@ "update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \ "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \ -#define NFS_BOOTCMD \ - "nfsargs=ip=:::::eth0:on root=/dev/nfs rw\0" \ - "nfsboot=pci enum; run setup; setenv bootargs ${defargs} ${nfsargs} " \ - "${setupargs} ${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \ - "run nfsdtbload; dhcp ${kernel_addr_r} " \ - "&& run fdt_fixup && bootz ${kernel_addr_r} - ${dtbparam}\0" \ - "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} " \ - "${soc}-${fdt_module}-${fdt_board}.dtb " \ - "&& setenv dtbparam ${fdt_addr_r}\0" - #define BOARD_EXTRA_ENV_SETTINGS \ "boot_file=zImage\0" \ + "boot_script_dhcp=boot.scr\0" \ "console=ttyS0\0" \ "defargs=lp0_vec=2064@0xf46ff000 core_edp_mv=1150 core_edp_ma=4000 " \ "usb_port_owner_info=2 lane_owner_info=6 emc_max_dvfs=0 " \ @@ -79,7 +70,6 @@ "fdt_board=eval\0" \ "fdt_fixup=;\0" \ "fdt_module=" FDT_MODULE "\0" \ - NFS_BOOTCMD \ UBOOT_UPDATE \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; pci enum && tftpboot ${loadaddr} " \ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index bbdcab29d8..9a611b163a 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -90,16 +90,6 @@ "ramdisk_addr_r=0x12200000\0" \ "scriptaddr=0x17000000\0" -#define NFS_BOOTCMD \ - "nfsargs=ip=:::::eth0:on root=/dev/nfs ro\0" \ - "nfsboot=run setup; " \ - "setenv bootargs ${defargs} ${nfsargs} ${setupargs} " \ - "${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \ - "run nfsdtbload; dhcp ${kernel_addr_r} " \ - "&& run fdt_fixup && bootz ${kernel_addr_r} ${dtbparam}\0" \ - "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \ - "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" - #ifndef CONFIG_TDX_APALIS_IMX6_V1_0 #define FDT_FILE "imx6q-apalis-eval.dtb" #define FDT_FILE_V1_0 "imx6q-apalis_v1_0-eval.dtb" @@ -109,13 +99,13 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ "boot_file=zImage\0" \ + "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off vmalloc=400M\0" \ "fdt_file=" FDT_FILE "\0" \ "fdtfile=" FDT_FILE "\0" \ "fdt_fixup=;\0" \ MEM_LAYOUT_ENV_SETTINGS \ - NFS_BOOTCMD \ UBOOT_UPDATE \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index eab4f22be3..33f2a3be2a 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -47,7 +47,8 @@ "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \ #define BOARD_EXTRA_ENV_SETTINGS \ - UBOOT_UPDATE + UBOOT_UPDATE \ + "boot_script_dhcp=boot.scr\0" #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 91f0f953a1..654b246b80 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -50,15 +50,6 @@ "ramdisk_addr_r=0x82200000\0" \ "scriptaddr=0x87000000\0" -#define NFS_BOOTCMD \ - "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ - "nfsboot=run setup; " \ - "setenv bootargs ${defargs} ${nfsargs} " \ - "${setupargs} ${vidargs}; echo Booting from NFS...;" \ - "dhcp ${kernel_addr_r} && " \ - "tftp ${fdt_addr_r} ${fdtfile} && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ - #define UBI_BOOTCMD \ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ @@ -98,9 +89,9 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - NFS_BOOTCMD \ UBI_BOOTCMD \ UBOOT_UPDATE \ + "boot_script_dhcp=boot.scr\0" \ "bootubipart=ubi\0" \ "console=ttymxc0\0" \ "defargs=user_debug=30\0" \ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 008fa6ef07..0f4e415678 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -8,101 +8,53 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#include <linux/stringify.h> - -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define USDHC1_BASE_ADDR 0x5b010000 -#define USDHC2_BASE_ADDR 0x5b020000 #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_SERVERIP 192.168.10.1 #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x83000000\0" \ - "kernel_addr_r=0x81000000\0" \ - "ramdisk_addr_r=0x83800000\0" \ - "scriptaddr=0x80800000\0" - -#ifdef CONFIG_AHAB_BOOT -#define AHAB_ENV "sec_boot=yes\0" -#else -#define AHAB_ENV "sec_boot=no\0" -#endif + "fdt_addr_r=0x9d400000\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_comp_addr_r=0xb0000000\0" \ + "kernel_comp_size=0x08000000\0" \ + "ramdisk_addr_r=0x9d500000\0" \ + "scriptaddr=0x9d480000\0" /* Boot M4 */ #define M4_BOOT_ENV \ "m4_0_image=m4_0.bin\0" \ - "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ - "${m4_0_image}\0" \ - "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ - -#define MFG_NAND_PARTITION "" + "loadm4image_0=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ + "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" +/* Enable Distro Boot */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ + func(USB, usb, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#undef BOOTENV_RUN_NET_USB_START -#define BOOTENV_RUN_NET_USB_START "" - -#define CONFIG_MFG_ENV_SETTINGS \ - "mfgtool_args=setenv bootargs ${consoleargs} " \ - "rdinit=/linuxrc g_mass_storage.stall=0 " \ - "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \ - "g_mass_storage.idProduct=0x37FF " \ - "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \ - "${vidargs} clk_ignore_unused\0" \ - "initrd_addr=0x83800000\0" \ - "initrd_high=0xffffffff\0" \ - "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \ - "${fdt_addr};\0" \ /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - AHAB_ENV \ BOOTENV \ - CONFIG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ MEM_LAYOUT_ENV_SETTINGS \ - "boot_file=Image\0" \ - "consoleargs=console=ttyLP3,${baudrate} earlycon\0" \ - "fdt_addr=0x83000000\0" \ - "fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \ - "fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \ - "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ - "image=Image\0" \ + "boot_script_dhcp=boot.scr\0" \ + "console=ttyLP3\0" \ + "fdt_board=eval-v3\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "mmcargs=setenv bootargs ${consoleargs} " \ - "root=PARTUUID=${uuid} rootwait " \ - "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - "mmcpart=1\0" \ - "netargs=setenv bootargs ${consoleargs} " \ - "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ - "${vidargs}\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ - "colibri-imx8x/${fdt_file}; booti ${loadaddr} - " \ - "${fdt_addr}\0" \ - "panel=NULL\0" \ - "script=boot.scr\0" \ - "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ + "consoleblank=0 earlycon\0" \ + "update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \ - "${blkcnt}; fi\0" \ - "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0" - -/* Link Definitions */ + "${blkcnt}; fi\0" #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -/* Environment in eMMC, before config block at the end of 1st "boot sector" */ - -/* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 - #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 @@ -121,7 +73,8 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 8000000 /* 8MHz */ -#define BOOTAUX_RESERVED_MEM_BASE 0x88000000 -#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */ +/* USB Config */ +#define CONFIG_USBD_HS +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #endif /* __COLIBRI_IMX8X_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 1dbc77dde1..ff3f3636ed 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -79,27 +79,17 @@ "ramdisk_addr_r=0x12200000\0" \ "scriptaddr=0x17000000\0" -#define NFS_BOOTCMD \ - "nfsargs=ip=:::::eth0:on root=/dev/nfs rw\0" \ - "nfsboot=run setup; " \ - "setenv bootargs ${defargs} ${nfsargs} ${setupargs} " \ - "${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \ - "run nfsdtbload; dhcp ${kernel_addr_r} " \ - "&& run fdt_fixup && bootz ${kernel_addr_r} ${dtbparam}\0" \ - "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \ - "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" - #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ "boot_file=zImage\0" \ + "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ "fdt_file=" FDT_FILE "\0" \ "fdtfile=" FDT_FILE "\0" \ "fdt_fixup=;\0" \ MEM_LAYOUT_ENV_SETTINGS \ - NFS_BOOTCMD \ UBOOT_UPDATE \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 92e24ea8c6..276667bb94 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -89,15 +89,6 @@ "ramdisk_addr_r=0x82100000\0" \ "scriptaddr=0x87000000\0" -#define NFS_BOOTCMD \ - "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ - "nfsboot=run setup; " \ - "setenv bootargs ${defargs} ${nfsargs} " \ - "${setupargs} ${vidargs}; echo Booting from NFS...;" \ - "dhcp ${kernel_addr_r} && " \ - "tftp ${fdt_addr_r} ${soc}-colibri${variant}-${fdt_board}.dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ - #define UBI_BOOTCMD \ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ @@ -136,10 +127,10 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - NFS_BOOTCMD \ MODULE_EXTRA_ENV_SETTINGS \ UBOOT_UPDATE \ "boot_file=zImage\0" \ + "boot_script_dhcp=boot.scr\0" \ "bootubipart=ubi\0" \ "console=ttymxc0\0" \ "defargs=\0" \ diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h deleted file mode 100644 index 975f745c98..0000000000 --- a/include/configs/colibri_pxa270.h +++ /dev/null @@ -1,158 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Toradex Colibri PXA270 configuration file - * - * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - * Copyright (C) 2015-2016 Marcel Ziswiler <marcel@ziswiler.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Board Configuration Options - */ -/* Avoid overwriting factory configuration block */ -#define CONFIG_BOARD_SIZE_LIMIT 0x40000 - -/* - * Environment settings - */ - -/* - * Serial Console Configuration - */ - -/* - * Bootloader Components Configuration - */ - -/* I2C support */ -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) -#define CONFIG_SYS_I2C_PXA -#define CONFIG_PXA_STD_I2C -#define CONFIG_PXA_PWR_I2C -#endif - -/* LCD support */ -#ifdef CONFIG_LCD -#define CONFIG_PXA_LCD -#define CONFIG_PXA_VGA -#define CONFIG_LCD_LOGO -#endif - -/* - * Networking Configuration - */ -#ifdef CONFIG_CMD_NET - -#define CONFIG_DRIVER_DM9000 1 -#define CONFIG_DM9000_BASE 0x08000000 -#define DM9000_IO (CONFIG_DM9000_BASE) -#define DM9000_DATA (CONFIG_DM9000_BASE + 4) -#define CONFIG_NET_RETRY_COUNT 10 - -#define CONFIG_BOOTP_BOOTFILESIZE -#endif - -/* - * Clock Configuration - */ -#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ - -/* - * DRAM Map - */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - -#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ -#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 - -/* - * NOR FLASH - */ -#ifdef CONFIG_CMD_FLASH -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT - -#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) - -#define CONFIG_SYS_FLASH_ERASE_TOUT (25 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_WRITE_TOUT (25 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_LOCK_TOUT (25 * CONFIG_SYS_HZ) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ) -#endif - -#define CONFIG_SYS_MONITOR_BASE 0x0 -#define CONFIG_SYS_MONITOR_LEN 0x40000 - -/* Skip factory configuration block */ - -/* - * GPIO settings - */ -#define CONFIG_SYS_GPSR0_VAL 0x00000000 -#define CONFIG_SYS_GPSR1_VAL 0x00020000 -#define CONFIG_SYS_GPSR2_VAL 0x0002c000 -#define CONFIG_SYS_GPSR3_VAL 0x00000000 - -#define CONFIG_SYS_GPCR0_VAL 0x00000000 -#define CONFIG_SYS_GPCR1_VAL 0x00000000 -#define CONFIG_SYS_GPCR2_VAL 0x00000000 -#define CONFIG_SYS_GPCR3_VAL 0x00000000 - -#define CONFIG_SYS_GPDR0_VAL 0xc8008000 -#define CONFIG_SYS_GPDR1_VAL 0xfc02a981 -#define CONFIG_SYS_GPDR2_VAL 0x92c3ffff -#define CONFIG_SYS_GPDR3_VAL 0x0061e804 - -#define CONFIG_SYS_GAFR0_L_VAL 0x80100000 -#define CONFIG_SYS_GAFR0_U_VAL 0xa5c00010 -#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a -#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50008 -#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa -#define CONFIG_SYS_GAFR2_U_VAL 0x4109a002 -#define CONFIG_SYS_GAFR3_L_VAL 0x54000310 -#define CONFIG_SYS_GAFR3_U_VAL 0x00005401 - -#define CONFIG_SYS_PSSR_VAL 0x30 - -/* - * Clock settings - */ -#define CONFIG_SYS_CKEN 0x00500240 -#define CONFIG_SYS_CCCR 0x02000290 - -/* - * Memory settings - */ -#define CONFIG_SYS_MSC0_VAL 0x9ee1c5f2 -#define CONFIG_SYS_MSC1_VAL 0x9ee1f994 -#define CONFIG_SYS_MSC2_VAL 0x9ee19ee1 -#define CONFIG_SYS_MDCNFG_VAL 0x090009c9 -#define CONFIG_SYS_MDREFR_VAL 0x2003a031 -#define CONFIG_SYS_MDMRS_VAL 0x00220022 -#define CONFIG_SYS_FLYCNFG_VAL 0x00010001 -#define CONFIG_SYS_SXCNFG_VAL 0x40044004 - -/* - * PCMCIA and CF Interfaces - */ -#define CONFIG_SYS_MECR_VAL 0x00000000 -#define CONFIG_SYS_MCMEM0_VAL 0x00028307 -#define CONFIG_SYS_MCMEM1_VAL 0x00014307 -#define CONFIG_SYS_MCATT0_VAL 0x00038787 -#define CONFIG_SYS_MCATT1_VAL 0x0001c787 -#define CONFIG_SYS_MCIO0_VAL 0x0002830f -#define CONFIG_SYS_MCIO1_VAL 0x0001430f - -#include "pxa-common.h" - -#endif /* __CONFIG_H */ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index c377187b80..3752581a27 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -27,6 +27,7 @@ /* Environment in NAND, 64K is a bit excessive but erase block is 512K anyway */ #define BOARD_EXTRA_ENV_SETTINGS \ + "boot_script_dhcp=boot.scr\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBOOT_UPDATE diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 324e607839..ca8ddf26f8 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -45,7 +45,8 @@ "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \ #define BOARD_EXTRA_ENV_SETTINGS \ - UBOOT_UPDATE + UBOOT_UPDATE \ + "boot_script_dhcp=boot.scr\0" #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 62f85185b7..68a2f3f3a3 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -46,15 +46,6 @@ "update_uboot=nand erase.part u-boot && " \ "nand write ${loadaddr} u-boot ${filesize}\0" \ -#define NFS_BOOTCMD \ - "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ - "nfsboot=run setup; " \ - "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ - "${setupargs} ${vidargs}; echo Booting from NFS...;" \ - "dhcp ${kernel_addr_r} && " \ - "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ - #define UBI_BOOTCMD \ "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ "ubi.fm_autoconvert=1\0" \ @@ -79,9 +70,9 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - NFS_BOOTCMD \ UBI_BOOTCMD \ UBOOT_UPDATE \ + "boot_script_dhcp=boot.scr\0" \ "console=ttyLP0\0" \ "defargs=user_debug=30\0" \ "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h deleted file mode 100644 index 7a78f98eb1..0000000000 --- a/include/configs/pxa-common.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Toradex Colibri PXA270 configuration file - * - * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> - */ - -#ifndef __CONFIG_PXA_COMMON_H__ -#define __CONFIG_PXA_COMMON_H__ - -/* - * OHCI USB - */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_SYS_USB_OHCI_BOARD_INIT -#ifdef CONFIG_CPU_PXA27X -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 -#else -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#endif -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4c000000 -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "pxa-ohci" -#endif - -#endif /* __CONFIG_PXA_COMMON_H__ */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 17583c0a6a..0d77657978 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -30,10 +30,12 @@ #endif #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x44000000\0" \ - "kernel_addr_r=0x42000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "fdt_addr_r=0x50200000\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_comp_addr_r=0x40200000\0" \ + "kernel_comp_size=0x08000000\0" \ + "ramdisk_addr_r=0x50300000\0" \ + "scriptaddr=0x50280000\0" /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD @@ -51,21 +53,15 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - "bootcmd_mfg=fastboot 0\0" \ "boot_file=Image\0" \ + "boot_script_dhcp=boot.scr\0" \ "console=ttymxc0\0" \ "fdt_addr=0x43000000\0" \ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ - "\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \ - "tftp ${fdt_addr} verdin/${fdtfile}; " \ - "booti ${loadaddr} - ${fdt_addr}\0" \ - "setup=setenv setupargs console=${console},${baudrate} " \ - "console=tty1 consoleblank=0 earlycon\0" \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ + "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ @@ -105,10 +101,13 @@ /* ENET */ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 7 #define FEC_QUIRK_ENET_MAC #define IMX_FEC_BASE 0x30BE0000 +#define CONFIG_IPADDR 192.168.10.2 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_SERVERIP 192.168.10.1 + /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index f8b4bf2df9..88299ad950 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -42,17 +42,20 @@ #define CONFIG_ETHPRIME "eth0" /* eqos is aliased on-module Ethernet interface */ #define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 7 #define FEC_QUIRK_ENET_MAC -#define PHY_ANEG_TIMEOUT 20000 +#define CONFIG_IPADDR 192.168.10.2 +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_SERVERIP 192.168.10.1 #endif /* CONFIG_CMD_NET */ #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x43000000\0" \ - "kernel_addr_r=0x40000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "fdt_addr_r=0x50200000\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_comp_addr_r=0x40200000\0" \ + "kernel_comp_size=0x08000000\0" \ + "ramdisk_addr_r=0x50300000\0" \ + "scriptaddr=0x50280000\0" /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD @@ -76,7 +79,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ - "bootcmd_mfg=fastboot 0\0" \ "boot_file=Image\0" \ "boot_scripts=" BOOT_SCRIPT "\0" \ "boot_script_dhcp=" BOOT_SCRIPT "\0" \ @@ -84,13 +86,7 @@ "fdt_board=dev\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \ - "\0" \ - "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \ - "tftp ${fdt_addr} verdin/${fdtfile}; " \ - "booti ${loadaddr} - ${fdt_addr}\0" \ - "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ diff --git a/lib/Kconfig b/lib/Kconfig index acd3d51bc9..a4c1175701 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -876,7 +876,7 @@ config LMB_USE_MAX_REGIONS config LMB_MAX_REGIONS int "Number of memory and reserved regions in lmb lib" depends on LMB && LMB_USE_MAX_REGIONS - default 8 + default 16 help Define the number of supported regions, memory and reserved, in the library logical memory blocks. diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile index 493995e303..a7579f0c5f 100644 --- a/scripts/dtc/pylibfdt/Makefile +++ b/scripts/dtc/pylibfdt/Makefile @@ -17,7 +17,7 @@ quiet_cmd_pymod = PYMOD $@ cmd_pymod = unset CROSS_COMPILE; unset CFLAGS; \ CC="$(HOSTCC)" LDSHARED="$(HOSTCC) -shared " \ LDFLAGS="$(HOSTLDFLAGS)" \ - VERSION="u-boot-$(UBOOTVERSION)" \ + VERSION="$(UBOOTVERSION)" \ CPPFLAGS="$(HOSTCFLAGS) -I$(LIBFDT_srcdir)" OBJDIR=$(obj) \ SOURCES="$(PYLIBFDT_srcs)" \ SWIG_OPTS="-I$(LIBFDT_srcdir) -I$(LIBFDT_srcdir)/.." \ diff --git a/tools/.gitignore b/tools/.gitignore index a88453f64d..5b7b13330d 100644 --- a/tools/.gitignore +++ b/tools/.gitignore @@ -28,6 +28,7 @@ /mxsboot /ncb /prelink-riscv +/printinitialenv /proftool /relocate-rela /spl_size_limit diff --git a/tools/Makefile b/tools/Makefile index 60231c728c..10dce12f62 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -264,6 +264,10 @@ clean-dirs := lib common always := $(hostprogs-y) +# Host tool to dump the currently configured default environment, +# build it on demand, i.e. not add it to 'always'. +hostprogs-y += printinitialenv + # Generated LCD/video logo LOGO_H = $(objtree)/include/bmp_logo.h LOGO_DATA_H = $(objtree)/include/bmp_logo_data.h diff --git a/tools/printinitialenv.c b/tools/printinitialenv.c new file mode 100644 index 0000000000..c58b234d67 --- /dev/null +++ b/tools/printinitialenv.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022 + * Max Krummenacher, Toradex + * + * Snippets taken from tools/env/fw_env.c + * + * This prints the list of default environment variables as currently + * configured. + * + */ + +#include <stdio.h> + +/* Pull in the current config to define the default environment */ +#include <linux/kconfig.h> + +#ifndef __ASSEMBLY__ +#define __ASSEMBLY__ /* get only #defines from config.h */ +#include <config.h> +#undef __ASSEMBLY__ +#else +#include <config.h> +#endif + +#define DEFAULT_ENV_INSTANCE_STATIC +#include <generated/environment.h> +#include <env_default.h> + +int main(void) +{ + char *env, *nxt; + + for (env = default_environment; *env; env = nxt + 1) { + for (nxt = env; *nxt; ++nxt) { + if (nxt >= &default_environment[sizeof(default_environment)]) { + fprintf(stderr, "## Error: environment not terminated\n"); + return -1; + } + } + printf("%s\n", env); + } + return 0; +} |