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authorArve Hjønnevåg <arve@android.com>2018-06-05 19:25:01 -0700
committerfaqiang.zhu <faqiang.zhu@nxp.com>2018-11-12 09:18:36 +0800
commit5e7a5994395140acb9c3847548b3cc1d8b910fdb (patch)
tree98ae6a5b4e72715f46d01f9884b96283f1d7c33e /lib
parent1939a7914ff48ebf3a02ea8ecb997b97e7a512a8 (diff)
ql-tipc: Compile fixes
Change-Id: I1c800fe39b5999169edd6e2acb9f66e557a3a86e
Diffstat (limited to 'lib')
-rw-r--r--lib/trusty/ql-tipc/arch/arm/trusty_dev.c10
-rw-r--r--lib/trusty/ql-tipc/arch/arm/trusty_mem.c2
2 files changed, 6 insertions, 6 deletions
diff --git a/lib/trusty/ql-tipc/arch/arm/trusty_dev.c b/lib/trusty/ql-tipc/arch/arm/trusty_dev.c
index 6407d738da..bd9a5fbfb6 100644
--- a/lib/trusty/ql-tipc/arch/arm/trusty_dev.c
+++ b/lib/trusty/ql-tipc/arch/arm/trusty_dev.c
@@ -61,12 +61,12 @@ static unsigned long smc(unsigned long r0,
unsigned long r2,
unsigned long r3)
{
- register unsigned long _r0 asm(SMC_ARG0) = r0;
- register unsigned long _r1 asm(SMC_ARG1) = r1;
- register unsigned long _r2 asm(SMC_ARG2) = r2;
- register unsigned long _r3 asm(SMC_ARG3) = r3;
+ register unsigned long _r0 __asm__(SMC_ARG0) = r0;
+ register unsigned long _r1 __asm__(SMC_ARG1) = r1;
+ register unsigned long _r2 __asm__(SMC_ARG2) = r2;
+ register unsigned long _r3 __asm__(SMC_ARG3) = r3;
- asm volatile(
+ __asm__ volatile(
__asmeq("%0", SMC_ARG0)
__asmeq("%1", SMC_ARG1)
__asmeq("%2", SMC_ARG2)
diff --git a/lib/trusty/ql-tipc/arch/arm/trusty_mem.c b/lib/trusty/ql-tipc/arch/arm/trusty_mem.c
index 785505c01a..56d8348d3c 100644
--- a/lib/trusty/ql-tipc/arch/arm/trusty_mem.c
+++ b/lib/trusty/ql-tipc/arch/arm/trusty_mem.c
@@ -83,7 +83,7 @@ typedef uintptr_t paddr_t;
/* Note: this will crash if called from user space */
static void arm64_write_ATS1ExW(uint64_t vaddr)
{
- uint32_t _current_el;
+ uint64_t _current_el;
__asm__ volatile("mrs %0, CurrentEL" : "=r" (_current_el));