board: toradex: up-port verdin imx8mm module support

This patch introduces changes on top of existing Verdin iMX8MM support in
the mainline U-Boot v2020.04.

Some patches were already upstreamed, some were squashed and included
into this commit:

78e80d3f ("board: toradex: add verdin imx8mm 2gb wb it v1.0a module support")
a6c18891 ("verdin-imx8mm: lpddr4_timing.c: intial lpddr4 calibration data")
b16da3d6 ("verdin-imx8mm: fix usb_1 device aka peripheral operation")
6451e680 ("verdin-imx8: do not undef configs configured using Kconfig")
d5382436 ("fsl-imx8mm-verdin.dts: remove fsl,rgmii_rxc_dly et. al.")
c24fe844 ("fsl-imx8mm-verdin.dts: fix eth phy power up")
b07ae5f3 ("verdin-imx8mm.c: set eth phy skew")
4eb91e6e ("tdx-cfg-block: adjust verdin naming")
569703d4 ("verdin-imx8mm: sync with EVK board")
8c8b56a5 ("tdx-cfg-block: add proper defines for other Verdin SKUs")

Relates-to: ELB-2771
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>

1 files changed, 102 insertions, 42 deletions

diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index dc0a2efec6..cc85ff25a7 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -1,25 +1,24 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2020 Toradex
+ * Copyright 2019 Toradex
  */
 
 #ifndef __VERDIN_IMX8MM_H
 #define __VERDIN_IMX8MM_H
 
-#include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
 
-#ifdef CONFIG_SECURE_BOOT
-#define CONFIG_CSF_SIZE			SZ_8K
-#endif
+#include "imx_env.h"
+
+#define CONFIG_DISPLAY_BOARDINFO_LATE
 
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
-#define CONFIG_SYS_MONITOR_LEN		SZ_512K
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
-#define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#define CONFIG_SYS_UBOOT_BASE		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_STACK		0x920000
@@ -32,7 +31,43 @@
 #define CONFIG_MALLOC_F_ADDR		0x930000
 /* For RAW image gives a error info not panic */
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
-#endif
+
+#undef CONFIG_DM_MMC
+#undef CONFIG_DM_PMIC
+#undef CONFIG_DM_PMIC_PFUZE100
+
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_BD71837
+
+#define CONFIG_SYS_I2C
+
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+#endif /* CONFIG_SPL_BUILD */
+
+#define CONFIG_FASTBOOT_USB_DEV 0
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_BOARD_POSTCLK_INIT
+
+#undef CONFIG_BOOTM_NETBSD
+
+/* ENET Config */
+/* ENET1 */
+#if defined(CONFIG_CMD_NET)
+
+#define CONFIG_FEC_XCV_TYPE		RGMII
+#define CONFIG_FEC_MXC_PHYADDR		7
+#define FEC_QUIRK_ENET_MAC
+
+#define IMX_FEC_BASE			0x30BE0000
+
+#define CONFIG_IPADDR			192.168.10.2
+#define CONFIG_NETMASK			255.255.255.0
+#define CONFIG_SERVERIP		192.168.10.1
+#endif /* CONFIG_CMD_NET */
 
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"fdt_addr_r=0x44000000\0" \
@@ -48,6 +83,7 @@
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 1) \
 	func(MMC, mmc, 0) \
+	func(USB, usb, 0) \
 	func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
 #undef CONFIG_ISO_PARTITION
@@ -66,63 +102,87 @@
 	"initrd_addr=0x43800000\0" \
 	"initrd_high=0xffffffffffffffff\0" \
 	"kernel_image=Image\0" \
-	"setup=setenv setupargs console=${console},${baudrate} " \
-		"console=tty1 consoleblank=0 earlycon\0" \
-	"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
-		"if test \"$confirm\" = \"y\"; then " \
-		"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
-		"${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
-		"${blkcnt}; fi\0"
-
-#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
-#define CONFIG_SYS_INIT_RAM_SIZE        SZ_2M
+	"setup=setenv setupargs console=${console},${baudrate} console=tty1 consoleblank=0 earlycon\0"
+
+#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x80000
 #define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 #define CONFIG_ENV_OVERWRITE
 #if defined(CONFIG_ENV_IS_IN_MMC)
 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
-#define CONFIG_SYS_MMC_ENV_DEV		0	/* USDHC1 eMMC */
+#undef CONFIG_ENV_SIZE
+#undef CONFIG_ENV_OFFSET
+
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE + \
+					 CONFIG_TDX_CFG_BLOCK_OFFSET)
+#define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_SYS_MMC_ENV_PART	1
 #endif
 
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20) /* Increase max gunzip size */
+
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		SZ_32M
-#define CONFIG_SYS_SDRAM_BASE           0x40000000
+#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (32*1024)) * 1024)
 
-/* SDRAM configuration */
-#define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE			SZ_2G /* 2GB DDR */
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define PHYS_SDRAM			0x40000000
+#define PHYS_SDRAM_SIZE		0x80000000 /* 2GB DDR */
 
 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 (PHYS_SDRAM_SIZE >> 1))
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
+
+#define CONFIG_BAUDRATE		115200
 
-/* UART */
 #define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_CBSIZE		SZ_2K
+#define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
 					sizeof(CONFIG_SYS_PROMPT) + 16)
-/* USDHC */
-#define CONFIG_FSL_USDHC
+
+#define CONFIG_IMX_BOOTAUX
+
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-#define CONFIG_SYS_I2C_SPEED		100000
 
-/* ENET */
-#define CONFIG_ETHPRIME                 "FEC"
-#define CONFIG_FEC_XCV_TYPE             RGMII
-#define CONFIG_FEC_MXC_PHYADDR          7
-#define FEC_QUIRK_ENET_MAC
-#define IMX_FEC_BASE			0x30BE0000
+#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
-#endif /*_VERDIN_IMX8MM_H */
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
+#endif
+#define CONFIG_SYS_I2C_SPEED		100000
 
+/* USB configs */
+#ifndef CONFIG_SPL_BUILD
+/* TODO moving USB_STORAGE to .config makes the SPL build fail */
+//#define CONFIG_USB_STORAGE
+#define CONFIG_USBD_HS
+
+#define CONFIG_USB_GADGET_MASS_STORAGE
+#endif /* !CONFIG_SPL_BUILD */
+
+#define CONFIG_MXC_USB_PORTSC			(PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_MXS
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IMX_VIDEO_SKIP
+#define CONFIG_RM67191
+#endif /* CONFIG_VIDEO */
+
+#endif /* __VERDIN_IMX8MM_H */