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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-04-10 14:09:25 +0200 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2019-05-23 11:38:10 +0200 |
| commit | 53bb8316583bf2206918457ec049b001d5b40a0f (patch) | |
| tree | 0c0fb7eefa4e6cf628394fdc36c91ca311555670 /doc | |
| parent | 067a4c001d8e3023b4dee95451410e127eb83715 (diff) | |
stm32mp1: ram: update parameter array initialization
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt index e5b1bb5e04..ee708ce92c 100644 --- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt +++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt @@ -102,7 +102,7 @@ controlleur attributes: phyc attributes: ---------------- - st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3) - for STM32MP15x: 10 values are requested in this order + for STM32MP15x: 11 values are requested in this order PGCR ACIOCR DXCCR |