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authorStefan Roese <sr@denx.de>2006-09-12 08:49:07 +0200
committerStefan Roese <sr@denx.de>2006-09-12 08:49:07 +0200
commita73c8dbb437fb55ecb660cb962c8c1cc85b8a654 (patch)
tree8d383c53c34301062acbf565746de0475356eca1 /doc
parent98e43917dc89631c46d0b8eb481345041912ebee (diff)
Update NAND boot documentation
Patch by Stefan Roese, 12 Sep 2006
Diffstat (limited to 'doc')
-rw-r--r--doc/README.nand-boot-ppc44024
1 files changed, 24 insertions, 0 deletions
diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440
index a82a10ee6a..a1c1d8c444 100644
--- a/doc/README.nand-boot-ppc440
+++ b/doc/README.nand-boot-ppc440
@@ -33,4 +33,28 @@ is set up. While still running from cache, I experienced problems accessing
the NAND controller.
+Example: Build and install NAND boot image for Sequoia (440EPx):
+
+a) Configure for sequoia with NAND boot support:
+# make sequoia_nand_config
+
+b) Build image(s)
+# make
+
+This will generate the SPL image in the "nand_spl" directory:
+nand_spl/u-boot-spl.bin
+Also another image is created spanning a whole NAND block (16kBytes):
+nand_spl/u-boot-spl-16k.bin
+The main NAND U-Boot image is generated in the toplevel directory:
+u-boot.bin
+A combined image of u-boot-spl-16k.bin and u-boot.bin is also created:
+u-boot-nand.bin
+
+This image should be programmed at offset 0 in the NAND flash:
+
+# tftp 100000 /tftpboot/sequoia/u-boot-nand.bin
+# nand erase 0 60000
+# nand write 100000 0 60000
+
+
September 07 2006, Stefan Roese <sr@denx.de>