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authorMichal Simek <michal.simek@xilinx.com>2016-05-17 13:33:11 +0200
committerMichal Simek <michal.simek@xilinx.com>2016-05-24 11:15:01 +0200
commit293271cbc3080a3d23afe48adafbfba271cd6761 (patch)
treee882878ccaeae856f599bfee73b88ee3b0fcea67 /configs/xilinx_zynqmp_zcu102_revB_defconfig
parente6a9ed04e78cf87ec97e306fa4e7a1669ef98df6 (diff)
ARM64: zynqmp: Enable CLK framework
ZynqMP is using fixed clocks now that's why enabling it to be available for drivers. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs/xilinx_zynqmp_zcu102_revB_defconfig')
-rw-r--r--configs/xilinx_zynqmp_zcu102_revB_defconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index 59e1cf1032..96a2be11d5 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y