board: verdin-imx8mp: update DDRC config to support different LPDDR4 memories

Add support to Verdin IMX8MP V1.1B SKU which uses
MT53E1G32D2FW-046 WT:B memory.
Compared to the 8 GB memory (MT53E2G32D4NQ-046 WT:A) used on
Verdin IMX8MP V1.0A it has 16 row addresses instead of 17.
In fact, the new memory, is a 2 GB/rank memory. The 8 GB memory is a
4 GB/rank memory.

Manually tweaking Host Interface addresses vs LPDDR4 signals mapping
it is possible to have a single configuration working with both memories:
 - Old configuration: HIF bit 30 -> rank, HIF bit 29 -> Row 16
 - New configuration: HIF bit 29 -> rank, HIF bit 30 -> Row 16

With this change the memory space from the host processor is contiguous
for both the configurations and the correct memory size is computed
using get_ram_size() at runtime.

Support for single rank memories still works thanks to the fact
dual ranks training fails (ddr_init->ddr_cfg_phy) toward single rank
memories.

Upstream-Status: Backport[72b912502aef]
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

1 files changed, 2 insertions, 3 deletions

diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c
index 3257431ed1..db2e88a095 100644
--- a/board/toradex/verdin-imx8mp/spl.c
+++ b/board/toradex/verdin-imx8mp/spl.c
@@ -55,11 +55,10 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
 void spl_dram_init(void)
 {
 	/*
-	 * try configuring for quad die, dual rank aka 8 GB falling back to
-	 * dual die, single rank aka 1 GB (untested), 2 GB or 4 GB if it fails
+	 * Try configuring for dual rank memory falling back to single rank
 	 */
 	if (ddr_init(&dram_timing)) {
-		printf("Quad die, dual rank failed, attempting dual die, single rank configuration.\n");
+		printf("Dual rank failed, attempting single rank configuration.\n");
 		ddr_init(&dram_timing2);
 	}
 }