diff options
| author | Francesco Dolcini <francesco.dolcini@toradex.com> | 2021-08-20 18:27:07 +0200 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2021-08-20 18:27:07 +0200 |
| commit | eb6c58cb014022d45a880c1eb9761e5d6ce623c0 (patch) | |
| tree | 901b9a72c3c4f08a94231e9425ac6a9e42d86278 /board/toradex/apalis_imx6/apalis_imx6.c | |
| parent | 240223cd41a776d1ddba96ac7252aeb4b2ebdb90 (diff) | |
apalis-imx6: use dynamic DDR calibration
Enable dynamic DDR calibration to have a reliable behavior on edge
temperatures conditions.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Diffstat (limited to 'board/toradex/apalis_imx6/apalis_imx6.c')
| -rw-r--r-- | board/toradex/apalis_imx6/apalis_imx6.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 40c71adf51..aadf2e52b1 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -1076,6 +1076,24 @@ static void ddr_init(int *table, int size) writel(table[2 * i + 1], table[2 * i]); } +/* Perform DDR DRAM calibration */ +static void spl_dram_perform_cal(void) +{ +#ifdef CONFIG_MX6_DDRCAL + int err; + struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize = 2, + }; + + err = mmdc_do_write_level_calibration(&ddr_sysinfo); + if (err) + printf("error %d from write level calibration\n", err); + err = mmdc_do_dqs_calibration(&ddr_sysinfo); + if (err) + printf("error %d from dqs calibration\n", err); +#endif +} + static void spl_dram_init(void) { int minc, maxc; @@ -1094,6 +1112,7 @@ static void spl_dram_init(void) break; }; udelay(100); + spl_dram_perform_cal(); } void board_init_f(ulong dummy) |