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| author | Srikanth Srinivasan <srikanth.srinivasan@freescale.com> | 2010-03-30 14:03:30 -0500 |
|---|---|---|
| committer | Scott Sweeny <scott.sweeny@timesys.com> | 2010-09-29 17:32:30 -0400 |
| commit | 04cbb96db06c5a1fba1a80d00f322b25ab656ede (patch) | |
| tree | cb7d8c66909e156c550e62e0d75ba2253c970e6a /board/freescale/p1022ds/p1022ds_diu.c | |
| parent | 7ce9279b6b3d9edf67e44f4de1d04bf26ed409e1 (diff) | |
P1022DS: Enable ddr_sdram_cfg[hse] for the platform
This patch enables DDR_SDRAM_CFG[HSE] for P1022DS.
This is needed mainly for higher frequencies but can
be left on for < 800MHz DDR frequency.
Disabled DDR_SDRAM_CFG[2T_EN] for 800MHz operation.
Also added debug prints for additional ddr registers.
Tested with the Hynix HMT125U7BFR8C-H9 and ELPIDA EBJ21EE8BAFA-DJ-E,
passed at 667MT/s or 800MT/s.
Tested-by: Jiang Yutang <B14898@freescale.com>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Diffstat (limited to 'board/freescale/p1022ds/p1022ds_diu.c')
0 files changed, 0 insertions, 0 deletions