diff options
| author | Vagrant Cascadian <vagrant@debian.org> | 2016-10-23 20:45:19 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-10-31 10:13:17 -0400 |
| commit | 3450a8596d3c06107ccf44d2ad41402449e681dd (patch) | |
| tree | 2977342c3e9511371484f532f00f819a30206326 /arch | |
| parent | da1a3bd4d38af6fc63fd93c8e47424d98e634d58 (diff) | |
Fix spelling of "resetting".
Cover-Letter: Fixes several spelling errors for the words "resetting",
"extended", "occur", and "multiple".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-exynos/dmc_init_ddr3.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/misc.c | 2 | ||||
| -rw-r--r-- | arch/mips/mach-au1x00/au1x00_usb_ohci.c | 3 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc5xxx/usb_ohci.c | 3 | ||||
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/usb_ohci.c | 3 |
5 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/mach-exynos/dmc_init_ddr3.c b/arch/arm/mach-exynos/dmc_init_ddr3.c index 25a9df9364..6a5d26cc69 100644 --- a/arch/arm/mach-exynos/dmc_init_ddr3.c +++ b/arch/arm/mach-exynos/dmc_init_ddr3.c @@ -618,7 +618,7 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset) /* * Send NOP, MRS and ZQINIT commands * Sending MRS command will reset the DRAM. We should not be - * reseting the DRAM after resume, this will lead to memory + * resetting the DRAM after resume, this will lead to memory * corruption as DRAM content is lost after DRAM reset */ dmc_config_mrs(mem, &drex0->directcmd); diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 5cbd8a4325..dd6b53b24d 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -362,7 +362,7 @@ int arch_early_init_r(void) * issuing warm reset. The ancient kernel code expects this * value to be written into the register by the bootloader, so * to support that old code, we write it here instead of in the - * reset_cpu() function just before reseting the CPU. + * reset_cpu() function just before resetting the CPU. */ writel(0xae9efebc, &sysmgr_regs->romcodegrp_warmramgrp_enable); diff --git a/arch/mips/mach-au1x00/au1x00_usb_ohci.c b/arch/mips/mach-au1x00/au1x00_usb_ohci.c index 42484e5712..088e612105 100644 --- a/arch/mips/mach-au1x00/au1x00_usb_ohci.c +++ b/arch/mips/mach-au1x00/au1x00_usb_ohci.c @@ -671,7 +671,8 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf __u32 info = 0; unsigned int toggle = 0; - /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */ + /* OHCI handles the DATA-toggles itself, we just use the + USB-toggle bits for resetting */ if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) { toggle = TD_T_TOGGLE; } else { diff --git a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c index b7c1b5594a..cf36954fe7 100644 --- a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c +++ b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c @@ -670,7 +670,8 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf __u32 info = 0; unsigned int toggle = 0; - /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */ + /* OHCI handles the DATA-toggles itself, we just use the + USB-toggle bits for resetting */ if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) { toggle = TD_T_TOGGLE; } else { diff --git a/arch/powerpc/cpu/ppc4xx/usb_ohci.c b/arch/powerpc/cpu/ppc4xx/usb_ohci.c index 65a0675446..27423e3779 100644 --- a/arch/powerpc/cpu/ppc4xx/usb_ohci.c +++ b/arch/powerpc/cpu/ppc4xx/usb_ohci.c @@ -673,7 +673,8 @@ static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buf __u32 info = 0; unsigned int toggle = 0; - /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */ + /* OHCI handles the DATA-toggles itself, we just use the + USB-toggle bits for resetting */ if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) { toggle = TD_T_TOGGLE; } else { |