diff options
| author | Thilo Jeremias <tjeremias@de.adit-jv.com> | 2012-07-04 18:19:11 +0200 |
|---|---|---|
| committer | Dirk Behme <dirk.behme@gmail.com> | 2012-11-11 11:42:28 +0100 |
| commit | 28b17e9f105b2725577e7739c12615aee8267bfa (patch) | |
| tree | da4d3c39d747c8a97e48ae64a469bb666100563c /arch | |
| parent | 83b4ff9f2da07304d44634bdea0ea4bc19b93c87 (diff) | |
i.MX6: add OTP support
Signed-off-by: Thilo Jeremias <tjeremias@de.adit-jv.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 14 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 18 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/sys_proto.h | 5 |
3 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index a01d96f48e..abbe8c8368 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -49,6 +49,20 @@ void enable_usboh3_clk(unsigned char enable) __raw_writel(reg, &imx_ccm->CCGR6); } +#ifdef CONFIG_IMX_OTP +void enable_otp_clk(unsigned char enable) +{ + u32 reg; + + reg = __raw_readl(&imx_ccm->CCGR2); + if (enable) + reg |= MXC_CCM_CCGR2_OCOTP_CTRL_MASK; + else + reg &= ~(MXC_CCM_CCGR2_OCOTP_CTRL_MASK); + __raw_writel(reg, &imx_ccm->CCGR2); + +} +#endif #ifdef CONFIG_I2C_MXC /* i2c_num can be from 0 - 2 */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 3eb0081ca8..93d1901f45 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -601,5 +601,23 @@ struct iomuxc_base_regs { u32 daisy[104]; /* 0x7b0..94c */ }; +#define BP_OCOTP_CTRL_WR_UNLOCK 16 +#define BM_OCOTP_CTRL_WR_UNLOCK 0xFFFF0000 +#define BV_OCOTP_CTRL_WR_UNLOCK__KEY 0x3E77 +#define BM_OCOTP_CTRL_RELOAD_SHADOWS 0x00000400 +#define BM_OCOTP_CTRL_ERROR 0x00000200 +#define BM_OCOTP_CTRL_BUSY 0x00000100 +#define BP_OCOTP_CTRL_ADDR 0 +#define BM_OCOTP_CTRL_ADDR 0x0000007F + +#define BP_OCOTP_TIMING_STROBE_READ 16 +#define BM_OCOTP_TIMING_STROBE_READ 0x003F0000 +#define BP_OCOTP_TIMING_RELAX 12 +#define BM_OCOTP_TIMING_RELAX 0x0000F000 +#define BP_OCOTP_TIMING_STROBE_PROG 0 +#define BM_OCOTP_TIMING_STROBE_PROG 0x00000FFF + +#define BM_OCOTP_READ_CTRL_READ_FUSE 0x00000001 + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 3193297610..a3478d4e16 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -46,4 +46,9 @@ void set_vddsoc(u32 mv); int fecmxc_initialize(bd_t *bis); u32 get_ahb_clk(void); u32 get_periph_clk(void); + +/* OTP related functionality */ +int imx_otp_read_one_u32(u32, u32 *); +int imx_otp_blow_one_u32(u32, u32, u32 *); +void enable_otp_clk(unsigned char); #endif |