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authorAneesh V <aneesh@ti.com>2011-08-16 04:33:05 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-04 11:36:16 +0200
commitcba4b1809f043bf85c806e5a4e342f62bd5ded45 (patch)
tree69a063b972d4ac839666a9b2c79203843d63936c /arch/arm/lib/board.c
parent98a48c5de545e5a5eedba0a868024ef0d4ae5347 (diff)
arm: do not force d-cache enable on all boards
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable() to board_init_r(). This enables d-cache for all ARM boards. As a result some of the arm boards that are not cache-ready are broken. Revert this change and allow platform code to take the decision on d-cache enabling. Also add some documentation for cache usage in ARM. Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch/arm/lib/board.c')
-rw-r--r--arch/arm/lib/board.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index c899839852..a7fb251aa7 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -452,11 +452,9 @@ void board_init_r(gd_t *id, ulong dest_addr)
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
monitor_flash_len = _end_ofs;
- /*
- * Enable D$:
- * I$, if needed, must be already enabled in start.S
- */
- dcache_enable();
+
+ /* Enable caches */
+ enable_caches();
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */