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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2016-11-18 10:25:12 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2016-11-21 14:29:41 +0100 |
| commit | 9ac88301273d78bc9837a94dff527685eb7785ab (patch) | |
| tree | 43b64d485a5d667690bdb8eab03cfcf20f0245b1 /arch/arm/dts/tegra124-apalis.dts | |
| parent | f6e4e10d7099f576f55093f7fee24b248cc33983 (diff) | |
apalis-tk1: adjust pin muxing for v1.1 hw
Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW.
Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka
not tristated and input driver enabled as well as it features some
magic properties even though the external loopback is disabled and the
internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's
SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is
now a not-connect on V1.1 HW in order to avoid any interference.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Diffstat (limited to 'arch/arm/dts/tegra124-apalis.dts')
0 files changed, 0 insertions, 0 deletions