diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-11-20 17:19:10 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-11-20 17:19:10 +0100 |
| commit | 524884460ef40abe19617e9a2855d1f88a978af4 (patch) | |
| tree | da14a6b8e67bf2e1a64cbf901f6f7aa2be697783 /arch/arm/cpu/armv7/vybrid/lowlevel_init.S | |
| parent | 5d8d4f5ef931d6f0d0195f3961534690b3c2b08d (diff) | |
colibri_vf: implement module type auto detection
Implement module type (e.g. VF50 vs. VF61) auto detection based on L2
cache availability. Set specific ARM core clock (e.g. 400 vs. 500 MHz)
as well as Linux machine id number.
While at it actually use memargs instead of hard-coded mem= value.
While at it fix sdboot command if initially booting U-Boot from NAND by
doing an explicit mmc part 0.
Diffstat (limited to 'arch/arm/cpu/armv7/vybrid/lowlevel_init.S')
| -rw-r--r-- | arch/arm/cpu/armv7/vybrid/lowlevel_init.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/vybrid/lowlevel_init.S b/arch/arm/cpu/armv7/vybrid/lowlevel_init.S index 8c22e3c365..630e4a8efe 100644 --- a/arch/arm/cpu/armv7/vybrid/lowlevel_init.S +++ b/arch/arm/cpu/armv7/vybrid/lowlevel_init.S @@ -132,7 +132,17 @@ ldr r1, =CONFIG_SYS_CLKCTRL_CCR str r1, [r0, #CLKCTL_CCR] +#ifdef CONFIG_AUTO_DETECT_FREQUENCY + /* check for L2 cache */ + ldr r2, =MSCM_BASE_ADDR + ldr r1, [r2, #MSCM_CP0CFG1_OFFSET] + cmp r1, #0x0 + ldr r1, =CONFIG_SYS_CLKCTRL_CCSR_400 + /* use 500 MHz if L2 cache present (Colibri VF61) */ + ldrne r1, =CONFIG_SYS_CLKCTRL_CCSR_500 +#else /* CONFIG_AUTO_DETECT_FREQUENCY */ ldr r1, =CONFIG_SYS_CLKCTRL_CCSR +#endif /* CONFIG_AUTO_DETECT_FREQUENCY */ str r1, [r0, #CLKCTL_CCSR] ldr r1, =CONFIG_SYS_CLKCTRL_CACRR |