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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-08-22 16:16:26 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-08-22 16:16:26 +0200 |
| commit | 2a1325206da5381292c2b268e248702c523cc927 (patch) | |
| tree | 45d684a865eab51b0711d07782b1d8e8ae9d9932 /arch/arm/cpu/armv7/tegra3/warmboot_avp.c | |
| parent | 2f2f858faddd3cce54f7c64bc8fc8b596c1ddfaf (diff) | |
Initial Toradex Colibri T20 L4T R15 support.T20_LinuxImageV2.0Alpha1_20120808
Diffstat (limited to 'arch/arm/cpu/armv7/tegra3/warmboot_avp.c')
| -rw-r--r-- | arch/arm/cpu/armv7/tegra3/warmboot_avp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/tegra3/warmboot_avp.c b/arch/arm/cpu/armv7/tegra3/warmboot_avp.c index 02772d42c1..02d320aed7 100644 --- a/arch/arm/cpu/armv7/tegra3/warmboot_avp.c +++ b/arch/arm/cpu/armv7/tegra3/warmboot_avp.c @@ -81,7 +81,7 @@ void wb_start(void) reg = SCLK_SWAKE_FIQ_SRC_CLKM | SCLK_SWAKE_IRQ_SRC_CLKM | SCLK_SWAKE_RUN_SRC_CLKM | SCLK_SWAKE_IDLE_SRC_CLKM | - SCLK_SYS_STATE_RUN; + SCLK_SYS_CPU_STATE_RUN; writel(reg, &clkrst->crc_sclk_brst_pol); /* Update PLLP output dividers for 408 MHz operation */ |