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| author | Heinrich Schuchardt <xypron.glpk@gmx.de> | 2018-12-26 17:20:35 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-04-22 12:06:39 -0400 |
| commit | dab8788a8cadaa18a44001f98fa959fc672fff4f (patch) | |
| tree | 2ede1f0e809092149aaa422970fe39721ed787b0 /MAINTAINERS | |
| parent | c986aa624b6a0a627f029b44945b60979e25d109 (diff) | |
cmd: add exception command
The 'exception' command allows to test exception handling.
This implementation supports ARM, x86, RISC-V and the following exceptions:
* 'breakpoint' - prefetch abort exception (ARM 32bit only)
* 'unaligned' - data abort exception (ARM only)
* 'undefined' - undefined instruction exception
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index aa4b3bc650..b9cb686a05 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -86,6 +86,7 @@ M: Albert Aribaud <albert.u.boot@aribaud.net> S: Maintained T: git git://git.denx.de/u-boot-arm.git F: arch/arm/ +F: cmd/arm/ ARM ALTERA SOCFPGA M: Marek Vasut <marex@denx.de> @@ -677,6 +678,7 @@ M: Rick Chen <rick@andestech.com> S: Maintained T: git git://git.denx.de/u-boot-riscv.git F: arch/riscv/ +F: cmd/riscv/ F: tools/prelink-riscv.c ROCKUSB @@ -788,6 +790,7 @@ M: Bin Meng <bmeng.cn@gmail.com> S: Maintained T: git git://git.denx.de/u-boot-x86.git F: arch/x86/ +F: cmd/x86/ XTENSA M: Max Filippov <jcmvbkbc@gmail.com> |