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authorTom Rini <trini@ti.com>2014-05-09 11:09:59 -0400
committerTom Rini <trini@ti.com>2014-05-09 11:09:59 -0400
commit146b468eb0203c9b1aa1de93723ffc82c85d1dc1 (patch)
tree765b1ad359a05e80b1568afb532deca097f5060f
parent5146fc2b37a3098f0973b2f2339e069adfc7d272 (diff)
parent4148b3d0dd62c71c13545d3c5374d015c23b544b (diff)
Merge branch 'master' of git://git.denx.de/u-boot-sparc
-rw-r--r--arch/sparc/cpu/leon2/cpu_init.c22
-rw-r--r--arch/sparc/cpu/leon3/cpu_init.c22
2 files changed, 28 insertions, 16 deletions
diff --git a/arch/sparc/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c
index de310fbbbb..6e07fe6bb4 100644
--- a/arch/sparc/cpu/leon2/cpu_init.c
+++ b/arch/sparc/cpu/leon2/cpu_init.c
@@ -13,6 +13,9 @@
#include <config.h>
+#define TIMER_BASE_CLK 1000000
+#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
+
DECLARE_GLOBAL_DATA_PTR;
/* reset CPU (jump to 0, without reset) */
@@ -90,7 +93,7 @@ void cpu_wait_ticks(unsigned long ticks)
while (get_timer(start) < ticks) ;
}
-/* initiate and setup timer0 interrupt to 1MHz
+/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
* Return irq number for timer int or a negative number for
* dealing with self
*/
@@ -98,28 +101,31 @@ int timer_interrupt_init_cpu(void)
{
LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
- /* 1ms ticks */
+ /* SYS_HZ ticks per second */
leon2->Timer_Counter_1 = 0;
- leon2->Timer_Reload_1 = 999; /* (((1000000 / 100) - 1)) */
+ leon2->Timer_Reload_1 = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
leon2->Timer_Control_1 =
(LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | LEON2_TIMER_CTRL_LD);
return LEON2_TIMER1_IRQNO;
}
+ulong get_tbclk(void)
+{
+ return TIMER_BASE_CLK;
+}
+
/*
* This function is intended for SHORT delays only.
*/
unsigned long cpu_usec2ticks(unsigned long usec)
{
- /* timer set to 1kHz ==> 1 clk tick = 1 msec */
- if (usec < 1000)
+ if (usec < US_PER_TICK)
return 1;
- return (usec / 1000);
+ return usec / US_PER_TICK;
}
unsigned long cpu_ticks2usec(unsigned long ticks)
{
- /* 1tick = 1usec */
- return ticks * 1000;
+ return ticks * US_PER_TICK;
}
diff --git a/arch/sparc/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c
index 4720f42a93..2f41d8847b 100644
--- a/arch/sparc/cpu/leon3/cpu_init.c
+++ b/arch/sparc/cpu/leon3/cpu_init.c
@@ -14,6 +14,9 @@
#include <config.h>
+#define TIMER_BASE_CLK 1000000
+#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
+
DECLARE_GLOBAL_DATA_PTR;
/* reset CPU (jump to 0, without reset) */
@@ -203,15 +206,15 @@ void cpu_wait_ticks(unsigned long ticks)
while (get_timer(start) < ticks) ;
}
-/* initiate and setup timer0 interrupt to 1MHz
+/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
* Return irq number for timer int or a negative number for
* dealing with self
*/
int timer_interrupt_init_cpu(void)
{
- /* 1ms ticks */
+ /* SYS_HZ ticks per second */
gptimer->e[0].val = 0;
- gptimer->e[0].rld = 999; /* (((1000000 / 100) - 1)) */
+ gptimer->e[0].rld = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
gptimer->e[0].ctrl =
(LEON3_GPTIMER_EN |
LEON3_GPTIMER_RL | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN);
@@ -219,19 +222,22 @@ int timer_interrupt_init_cpu(void)
return gptimer_irq;
}
+ulong get_tbclk(void)
+{
+ return TIMER_BASE_CLK;
+}
+
/*
* This function is intended for SHORT delays only.
*/
unsigned long cpu_usec2ticks(unsigned long usec)
{
- /* timer set to 1kHz ==> 1 clk tick = 1 msec */
- if (usec < 1000)
+ if (usec < US_PER_TICK)
return 1;
- return (usec / 1000);
+ return usec / US_PER_TICK;
}
unsigned long cpu_ticks2usec(unsigned long ticks)
{
- /* 1tick = 1usec */
- return ticks * 1000;
+ return ticks * US_PER_TICK;
}