diff options
| author | Felix Radensky <felix@embedded-sol.com> | 2010-01-23 01:35:24 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-01-23 17:53:55 +0100 |
| commit | eb20392ca986074c78ee4f241a8f2369777a8df3 (patch) | |
| tree | 6dc8b7190b81d7c2b579381de2f3456f65a44fc0 | |
| parent | 57ab8a129dd4121711540e2b976aff882998de51 (diff) | |
ppc4xx: Fix sending type 1 PCI transactions
The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | drivers/pci/pci_indirect.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c index ab51f8d01e..2070d0134b 100644 --- a/drivers/pci/pci_indirect.c +++ b/drivers/pci/pci_indirect.c @@ -59,7 +59,8 @@ indirect_##rw##_config_##size(struct pci_controller *hose, \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ return 0; \ } -#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) +#elif defined(CONFIG_440GX) || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ indirect_##rw##_config_##size(struct pci_controller *hose, \ |