summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFelix Radensky <felix@embedded-sol.com>2010-01-19 21:19:06 +0200
committerWolfgang Denk <wd@denx.de>2010-01-23 17:53:22 +0100
commit57ab8a129dd4121711540e2b976aff882998de51 (patch)
treeb9e8e83a1814041ee14d8f847768dda8ddf2660b
parent17ab3057bde25208af71326c0ff213d05eadb318 (diff)
ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMs
On platforms where SPD EEPROM and another EEPROM have adjacent I2C addresses SPD_EEPROM_ADDRESS should be defined as a single element array, otherwise DDR2 setup code would fail with the following error: ERROR: Unknown DIMM detected in slot 1 However, fixing SPD_EEPROM_ADDRESS would result in another error: ERROR: DIMM's DDR1 and DDR2 type can not be mixed. This happens because initdram() routine does not explicitly initialize dimm_populated array. This patch fixes the problem. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r--cpu/ppc4xx/44x_spd_ddr2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index f8aa14aadb..593a286919 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -426,7 +426,7 @@ phys_size_t initdram(int board_type)
unsigned char spd0[MAX_SPD_BYTES];
unsigned char spd1[MAX_SPD_BYTES];
unsigned char *dimm_spd[MAXDIMMS];
- unsigned long dimm_populated[MAXDIMMS];
+ unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE};
unsigned long num_dimm_banks; /* on board dimm banks */
unsigned long val;
ddr_cas_id_t selected_cas = DDR_CAS_5; /* preset to silence compiler */