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authorWolfgang Denk <wd@pollux.denx.de>2006-10-24 15:18:23 +0200
committerWolfgang Denk <wd@pollux.denx.de>2006-10-24 15:18:23 +0200
commit034df411c1feecf8fe9f382a52b28a36a8f5d933 (patch)
treefb46358d4219a8a65457b95d4261613ec0a59e53
parent0ab292cbc1add30abb8767ae64ebfaac7504d1f6 (diff)
parent2ba20ec65a23ec3a5f1f09e552f2082d841c4031 (diff)
Merge with http://www.jdl.com/software/u-boot-86xx.git
-rw-r--r--include/asm-ppc/immap_85xx.h36
-rw-r--r--include/asm-ppc/immap_86xx.h49
2 files changed, 9 insertions, 76 deletions
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 7a4345a740..5377c2eb5b 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -9,6 +9,9 @@
#ifndef __IMMAP_85xx__
#define __IMMAP_85xx__
+#include <asm/types.h>
+#include <asm/fsl_i2c.h>
+
/*
* Local-Access Registers and ECM Registers(0x0000-0x2000)
*/
@@ -129,37 +132,8 @@ typedef struct ccsr_ddr {
* I2C Registers(0x3000-0x4000)
*/
typedef struct ccsr_i2c {
- u_char i2cadr; /* 0x3000 - I2C Address Register */
-#define MPC85xx_I2CADR_MASK 0xFE
- char res1[3];
- u_char i2cfdr; /* 0x3004 - I2C Frequency Divider Register */
-#define MPC85xx_I2CFDR_MASK 0x3F
- char res2[3];
- u_char i2ccr; /* 0x3008 - I2C Control Register */
-#define MPC85xx_I2CCR_MEN 0x80
-#define MPC85xx_I2CCR_MIEN 0x40
-#define MPC85xx_I2CCR_MSTA 0x20
-#define MPC85xx_I2CCR_MTX 0x10
-#define MPC85xx_I2CCR_TXAK 0x08
-#define MPC85xx_I2CCR_RSTA 0x04
-#define MPC85xx_I2CCR_BCST 0x01
- char res3[3];
- u_char i2csr; /* 0x300c - I2C Status Register */
-#define MPC85xx_I2CSR_MCF 0x80
-#define MPC85xx_I2CSR_MAAS 0x40
-#define MPC85xx_I2CSR_MBB 0x20
-#define MPC85xx_I2CSR_MAL 0x10
-#define MPC85xx_I2CSR_BCSTM 0x08
-#define MPC85xx_I2CSR_SRW 0x04
-#define MPC85xx_I2CSR_MIF 0x02
-#define MPC85xx_I2CSR_RXAK 0x01
- char res4[3];
- u_char i2cdr; /* 0x3010 - I2C Data Register */
-#define MPC85xx_I2CDR_DATA 0xFF
- char res5[3];
- u_char i2cdfsrr; /* 0x3014 - I2C Digital Filtering Sampling Rate Register */
-#define MPC85xx_I2CDFSRR 0x3F
- char res6[4075];
+ struct fsl_i2c i2c[1];
+ u8 res[4096 - 1 * sizeof(struct fsl_i2c)];
} ccsr_i2c_t;
#if defined(CONFIG_MPC8540) \
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index 685fcafdf2..a5552c48ee 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -10,6 +10,8 @@
#ifndef __IMMAP_86xx__
#define __IMMAP_86xx__
+#include <asm/types.h>
+#include <asm/fsl_i2c.h>
/* Local-Access Registers and MCM Registers(0x0000-0x2000) */
typedef struct ccsr_local_mcm {
@@ -155,52 +157,9 @@ typedef struct ccsr_ddr {
/* Daul I2C Registers(0x3000-0x4000) */
-
typedef struct ccsr_i2c {
- u_char i2cadr1; /* 0x3000 - I2C 1 Address Register */
-#define MPC86xx_I2CADR_MASK 0xFE
- char res1[3];
- u_char i2cfdr1; /* 0x3004 - I2C 1 Frequency Divider Register */
-#define MPC86xx_I2CFDR_MASK 0x3F
- char res2[3];
- u_char i2ccr1; /* 0x3008 - I2C 1 Control Register */
-#define MPC86xx_I2CCR_MEN 0x80
-#define MPC86xx_I2CCR_MIEN 0x40
-#define MPC86xx_I2CCR_MSTA 0x20
-#define MPC86xx_I2CCR_MTX 0x10
-#define MPC86xx_I2CCR_TXAK 0x08
-#define MPC86xx_I2CCR_RSTA 0x04
-#define MPC86xx_I2CCR_BCST 0x01
- char res3[3];
- u_char i2csr1; /* 0x300c - I2C 1 Status Register */
-#define MPC86xx_I2CSR_MCF 0x80
-#define MPC86xx_I2CSR_MAAS 0x40
-#define MPC86xx_I2CSR_MBB 0x20
-#define MPC86xx_I2CSR_MAL 0x10
-#define MPC86xx_I2CSR_BCSTM 0x08
-#define MPC86xx_I2CSR_SRW 0x04
-#define MPC86xx_I2CSR_MIF 0x02
-#define MPC86xx_I2CSR_RXAK 0x01
- char res4[3];
- u_char i2cdr1; /* 0x3010 - I2C 1 Data Register */
-#define MPC86xx_I2CDR_DATA 0xFF
- char res5[3];
- u_char i2cdfsrr1; /* 0x3014 - I2C 1 Digital Filtering Sampling Rate Register */
-#define MPC86xx_I2CDFSRR 0x3F
- char res6[235];
-
- u_char i2cadr2; /* 0x3100 - I2C 2 Address Register */
- char res7[3];
- u_char i2cfdr2; /* 0x3104 - I2C 2 Frequency Divider Register */
- char res8[3];
- u_char i2ccr2; /* 0x3108 - I2C 2 Control Register */
- char res9[3];
- u_char i2csr2; /* 0x310c - I2C 2 Status Register */
- char res10[3];
- u_char i2cdr2; /* 0x3110 - I2C 2 Data Register */
- char res11[3];
- u_char i2cdfsrr2; /* 0x3114 - I2C 2 Digital Filtering Sampling Rate Register */
- char res12[3819];
+ struct fsl_i2c i2c[2];
+ u8 res[4096 - 2 * sizeof(struct fsl_i2c)];
} ccsr_i2c_t;
/* DUART Registers(0x4000-0x5000) */