diff options
author | Manorit Chawdhry <m-chawdhry@ti.com> | 2023-02-08 13:17:05 +0530 |
---|---|---|
committer | Udit Kumar <u-kumar1@ti.com> | 2023-02-09 14:34:41 +0530 |
commit | 8fa9336ef5435898d53fc161d67b4d80c6019d97 (patch) | |
tree | 2037fee23656204876e53afb65e469bc21fdd07d | |
parent | 997728e93f844bb7f0a9f7cf72fb44374e9634c0 (diff) |
arm: mach-k3: j7200: Fix firewall warnings at boot time
J721E and J7200 have same file j721e_init.c which had the firewall
configs for J721E being applied on J7200 causing the warnings. Split the
firewalls for both the boards to remove those warnings.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
-rw-r--r-- | arch/arm/mach-k3/j721e_init.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index ad55a556bb..f1ce45d69b 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -28,6 +28,7 @@ #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW struct fwl_data cbass_hc_cfg0_fwls[] = { +#if defined(CONFIG_TARGET_J721E_R5_EVM) { "PCIE0_CFG", 2560, 8 }, { "PCIE1_CFG", 2561, 8 }, { "USB3SS0_CORE", 2568, 4 }, @@ -36,11 +37,16 @@ struct fwl_data cbass_hc_cfg0_fwls[] = { { "UFS_HCI0_CFG", 2580, 4 }, { "SERDES0", 2584, 1 }, { "SERDES1", 2585, 1 }, +#elif defined(CONFIG_TARGET_J7200_R5_EVM) + { "PCIE1_CFG", 2561, 7 }, +#endif }, cbass_hc0_fwls[] = { +#if defined(CONFIG_TARGET_J721E_R5_EVM) { "PCIE0_HP", 2528, 24 }, { "PCIE0_LP", 2529, 24 }, { "PCIE1_HP", 2530, 24 }, { "PCIE1_LP", 2531, 24 }, +#endif }, cbass_rc_cfg0_fwls[] = { { "EMMCSD4SS0_CFG", 2380, 4 }, }, cbass_rc0_fwls[] = { |