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| author | Nitin Garg <nitin.garg@nxp.com> | 2022-01-11 16:09:28 -0600 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2022-01-11 16:19:55 -0600 |
| commit | 00034b66a22c3d902e68ba2304ed6dbd8d5b5893 (patch) | |
| tree | 401c46728418c53a4ef6196fdbae2e58b31dd4ec | |
| parent | f934f19accfe9cd17c0788ef35b7d22b57bcf10f (diff) | |
LF-5298: imx8dxl: Add support for DXL B0 SOC
Add support for DXL B0, fix the chip version for B0.
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
(cherry picked from commit 65d5015ffc0eab3d1342c62d2f538a5fbc0fe93d)
| -rw-r--r-- | arch/arm/mach-imx/imx8/cpu.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 1b0d1cca00..403eb06e80 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -910,18 +910,25 @@ u32 get_cpu_rev(void) u32 id = 0, rev = 0; int ret; + /* returns ID - chip id [4:0], chip revision [9:5]*/ ret = sc_misc_get_control(-1, SC_R_SYSTEM, SC_C_ID, &id); if (ret) return 0; + /* Extract silicon version */ rev = (id >> 5) & 0xf; + /* Extract chip ID and add dummy */ id = (id & 0x1f) + MXC_SOC_IMX8; /* Dummy ID for chip */ - /* 8DXL uses A1/A2, so generate dummy rev to differentiate with B/C */ - if (id == MXC_CPU_IMX8DXL && rev != 0) - rev = 0x10 + rev; + /* 8DXL A1: use dummy rev to differentiate from B */ + if (id == MXC_CPU_IMX8DXL && rev == CHIP_REV_B) + rev = CHIP_REV_A1; + /* 8DXL B0: detect as B instead of C */ + else if (id == MXC_CPU_IMX8DXL && rev == CHIP_REV_C) + rev = CHIP_REV_B; - return (id << 12) | rev; + /* return Chip ID in [31:12] and silicon ver in [11:0]*/ + return (id << 12) | (rev & 0xfff); } static bool check_device_power_off(struct udevice *dev, |