colibri-imx8x: up-port initial implementation

USB (both host and device), Networking, MMC/SD work.

Testing:
-----------------------------------------------

U-Boot 2020.04-00119-g9dc5e94cb0-dirty (Jul 30 2020 - 22:36:54 +0300)

CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 47C

DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a090000
Out:   serial@5a090000
Err:   serial@5a090000
Model: Toradex Colibri iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.0B, Serial# 06494331
Net:   eth0: ethernet@5b040000 [PRIME]
Boot from USB for mfgtools
Hit any key to stop autoboot:  0
-----------------------------------------------

Was tested with:

imx-mkimage: imx_5.4.24_2.1.0
imx-scfw: ab182211e("Update .gitignore to ignore our built files and files from vscode")
imx-atf: imx_5.4.24_2.1.0
imx-seco: 3.6.3 [1]
-----------------------------------------------

Dropped patches from toradex_imx_v2018.03_4.14.98_2.3.0_bringup
as they have come in from mainline v2020.04 or just not relevant anymore:

9bfdda4f ("tdx-cfg-block.c: correct colibri imx8 string")
ae52342b ("colibri-imx8qxp: initial add")
9b950998 ("colibri-imx8qxp: move debug uart to lpuart3")
f9b0065b ("colibri-imx8qxp: synchronize with imx8qxp-mek from beta2")
982b4667 ("colibri-imx8qxp: forward port to 2018.03")
5c80880d ("colibri-imx8qxp: add unused pins as gpio")
30b37a6a ("colibri-imx8qxp: adjust copyright/licensing headers)
873a9561 ("colibri-imx8qxp: fix top-level compatible")
0e0f095d ("colibri-imx8qxp: clean-up device tree")
f61187df ("colibri-imx8qxp: clean-up configuration")
85a5d16b ("colibri-imx8qxp: clean-up board file")
a5a9bb4b ("colibri-imx8qxp: fused modules boot from emmc")
39c20ddd ("colibri-imx8qxp: default to dsihdmi device tree")
7443a6e5 ("colibri-imx8qxp: fix usb device/host functionality")
c721083a ("colibri-imx8qxp: fix ethernet functionality")
9f40db9d ("colibri-imx8qxp: adjust copyright/licensing headers some more")
9070b6f0 ("colibri-imx8qxp: dts: clean-up whitespace")
257470ac ("colibri-imx8x: enable FDT relocation")
a9272336 ("colibri-imx8qxp: change default device tree")
8470fb25 ("colibri-imx8x/apalis-imx8: converge scriptaddr for distroboot")
62493440 ("apalis-imx8/colibri-imx8x: use proper distroboot script")
f1993901 ("apalis-imx8/colibri-imx8x: set fdtfile since it is used by distro bootcmd")
890d03ae ("colibri-imx8qxp: sync with MEK platform")
eeb1d9b8 ("colibri-imx8qxp: move environment into first boot area")
c8c562ea ("colibri-imx8qxp: do not undef configs configured using Kconfig")
12489199 ("colibri-imx8qxp: make sure config block fdt fix-ups are called")
6a84ffaa ("colibri-imx8qxp: modify default ramdisk loading address")

[1] https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-3.6.3.bin

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>

6 files changed, 394 insertions, 83 deletions

diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
index 322429a98a..7b2bf7e2cd 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
+++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
@@ -3,6 +3,30 @@
  * Copyright 2019 Toradex AG
  */
 
+/ {
+
+	aliases {
+		usbhost1 = &usbh3;
+		usbgadget0 = &usbg1;
+	};
+
+	usbh3: usbh3 {
+		compatible = "Cadence,usb3-host";
+		dr_mode = "host";
+		cdns3,usb = <&usbotg3>;
+		status = "okay";
+	};
+
+	usbg1: usbg1 {
+		compatible = "fsl,imx27-usb-gadget";
+		dr_mode = "peripheral";
+		chipidea,usb = <&usbotg1>;
+		status = "okay";
+		u-boot,dm-pre-proper;
+	};
+
+};
+
 &{/imx8qx-pm} {
 
 	u-boot,dm-pre-proper;
@@ -72,6 +96,22 @@
 	u-boot,dm-pre-proper;
 };
 
+&pd_conn_usbotg0 {
+	u-boot,dm-spl;
+};
+
+&pd_conn_usbotg0_phy {
+	u-boot,dm-spl;
+};
+
+&pd_conn_usb2 {
+	u-boot,dm-spl;
+};
+
+&pd_conn_usb2_phy {
+	u-boot,dm-spl;
+};
+
 &pd_conn_sdch0 {
 	u-boot,dm-pre-proper;
 };
@@ -122,8 +162,30 @@
 
 &usdhc1 {
 	u-boot,dm-pre-proper;
+	/delete-property/ assigned-clock-parents;
 };
 
 &usdhc2 {
 	u-boot,dm-pre-proper;
+	/delete-property/ assigned-clock-parents;
+};
+
+&usbphy1 {
+	u-boot,dm-pre-proper;
+};
+
+&usbotg1 {
+	u-boot,dm-pre-proper;
+};
+
+&usbotg3 {
+	phys = <&usbphynop1>;
+	u-boot,dm-pre-proper;
+};
+
+&usbphynop1 {
+	compatible = "cdns,usb3-phy";
+	reg = <0x0 0x5B160000 0x0 0x40000>;
+	#phy-cells = <0>;
+	u-boot,dm-pre-proper;
 };
diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts
index 0c20edf2cf..e6b01378f3 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri.dts
+++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * Copyright 2019 Toradex AG
+ * Copyright 2018-2019 Toradex
  */
 
 /dts-v1/;
@@ -17,22 +17,31 @@
 		stdout-path = &lpuart3;
 	};
 
-	reg_usbh_vbus: regulator-usbh-vbus {
-		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usbh1_reg>;
-		regulator-name = "usbh_vbus";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		reg_usbh_vbus: regulator-usbh-vbus {
+			compatible = "regulator-fixed";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usbh1_reg>;
+			regulator-name = "usbh_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
+		};
 	};
+
 };
 
 &iomuxc {
+	u-boot,dm-pre-proper;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>;
 
 	colibri-imx8qxp {
+	u-boot,dm-pre-proper;
 		pinctrl_lpuart0: lpuart0grp {
 			fsl,pins = <
 				SC_P_UART0_RX_ADMA_UART0_RX	0x06000020
@@ -157,6 +166,7 @@
 		};
 
 		pinctrl_usdhc1: usdhc1grp {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
 				SC_P_EMMC0_CMD_CONN_EMMC0_CMD		0x00000021
@@ -174,6 +184,7 @@
 		};
 
 		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
 				SC_P_EMMC0_CMD_CONN_EMMC0_CMD		0x00000021
@@ -191,6 +202,7 @@
 		};
 
 		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
 				SC_P_EMMC0_CMD_CONN_EMMC0_CMD		0x00000021
@@ -208,12 +220,14 @@
 		};
 
 		pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_QSPI0A_DATA0_LSIO_GPIO3_IO09	0x06000021
 			>;
 		};
 
 		pinctrl_usdhc2: usdhc2grp {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041
 				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021
@@ -226,6 +240,7 @@
 		};
 
 		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041
 				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021
@@ -238,6 +253,7 @@
 		};
 
 		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+			u-boot,dm-pre-proper;
 			fsl,pins = <
 				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041
 				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021
@@ -248,9 +264,27 @@
 				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000021
 			>;
 		};
+
+		pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
+			fsl,pins = <
+				SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020
+				SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020
+			>;
+		};
+
+		pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp {
+			fsl,pins = <
+				SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020
+				SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020
+			>;
+		};
 	};
 };
 
+&A35_0 {
+	u-boot,dm-pre-reloc;
+};
+
 &lpuart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_lpuart0>;
@@ -307,6 +341,24 @@
 	status = "okay";
 };
 
+&i2c0_mipi_lvds0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
+&i2c0_mipi_lvds1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
 &usdhc1 {
 	bus-width = <8>;
 	non-removable;
@@ -326,3 +378,16 @@
 	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
 	status = "okay";
 };
+
+&usbotg1 {
+	srp-disable;
+	hnp-disable;
+	adp-disable;
+	disable-over-current;
+	status = "okay";
+};
+
+&usbotg3 {
+	status = "okay";
+	vbus-supply = <&reg_usbh_vbus>;
+};
diff --git a/board/toradex/colibri-imx8x/Makefile b/board/toradex/colibri-imx8x/Makefile
index e3945c8f15..783d4fb5ba 100644
--- a/board/toradex/colibri-imx8x/Makefile
+++ b/board/toradex/colibri-imx8x/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
-# Copyright 2019 Toradex
+# Copyright 2018-2019 Toradex
 #
 
 obj-y += colibri-imx8x.o
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index e4d762f5df..d57fe4d5ef 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -1,36 +1,48 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2019 Toradex
+ * Copyright 2018-2019 Toradex
  */
-
 #include <common.h>
 #include <cpu_func.h>
+#include <env.h>
+#include <errno.h>
 #include <init.h>
+#include <linux/libfdt.h>
+#include <fsl_esdhc_imx.h>
+#include <fdt_support.h>
 
+#include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/clock.h>
+#include <asm/arch-imx8/sci/sci.h>
 #include <asm/arch/imx8-pins.h>
+#include <asm/arch/snvs_security_sc.h>
 #include <asm/arch/iomux.h>
-#include <asm/arch/sci/sci.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <env.h>
-#include <errno.h>
-#include <linux/libfdt.h>
+
+#include <power-domain.h>
+#include <usb.h>
 
 #include "../common/tdx-cfg-block.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
-			 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
-			 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
-			 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+#define ESDHC_PAD_CTRL	((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
+						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+
+#define ESDHC_CLK_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
+						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+
+#define GPIO_PAD_CTRL	((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
+						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
+
+#define UART_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
+						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 static iomux_cfg_t uart3_pads[] = {
 	SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
 	SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
-	/* Transceiver FORCEOFF# signal, mux to use pull-up */
+	/* Transceiver FORCEOFF# signal, mux to use pullup */
 	SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
@@ -41,43 +53,41 @@ static void setup_iomux_uart(void)
 
 int board_early_init_f(void)
 {
-	sc_pm_clock_rate_t rate;
-	sc_err_t err = 0;
+	sc_pm_clock_rate_t rate = SC_80MHZ;
+	int ret;
 
 	/*
 	 * This works around that having only UART3 up the baudrate is 1.2M
 	 * instead of 115.2k. Set UART0 clock root to 80 MHz
 	 */
-	rate = 80000000;
-	err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
-	if (err != SC_ERR_NONE)
-		return 0;
+	ret = sc_pm_setup_uart(SC_R_UART_0, rate);
+	if (ret)
+		return ret;
 
-	/* Set UART3 clock root to 80 MHz and enable it */
-	rate = SC_80MHZ;
-	err = sc_pm_setup_uart(SC_R_UART_3, rate);
-	if (err != SC_ERR_NONE)
-		return 0;
+	/* Set UART0 clock root to 80 MHz */
+	ret = sc_pm_setup_uart(SC_R_UART_3, rate);
+	if (ret)
+		return ret;
 
 	setup_iomux_uart();
 
 	return 0;
 }
 
-#if IS_ENABLED(CONFIG_DM_GPIO)
-static void board_gpio_init(void)
-{
-	/* TODO */
-}
-#else
-static inline void board_gpio_init(void) {}
-#endif
 
-#if IS_ENABLED(CONFIG_FEC_MXC)
+#ifdef CONFIG_FEC_MXC
 #include <miiphy.h>
 
 int board_phy_config(struct phy_device *phydev)
 {
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
 	if (phydev->drv->config)
 		phydev->drv->config(phydev);
 
@@ -85,9 +95,44 @@ int board_phy_config(struct phy_device *phydev)
 }
 #endif
 
+#undef CONFIG_MXC_GPIO /* TODO */
+#ifdef CONFIG_MXC_GPIO
+#define IOEXP_RESET IMX_GPIO_NR(1, 1)
+
+static iomux_cfg_t board_gpios[] = {
+	SC_P_SPI2_SDO | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
+	SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(4) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
+};
+
+static void board_gpio_init(void)
+{
+	int ret;
+	struct gpio_desc desc;
+
+	ret = dm_gpio_lookup_name("gpio@1a_3", &desc);
+	if (ret)
+		return;
+
+	ret = dm_gpio_request(&desc, "bb_per_rst_b");
+	if (ret)
+		return;
+
+	dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
+	dm_gpio_set_value(&desc, 0);
+	udelay(50);
+	dm_gpio_set_value(&desc, 1);
+
+	imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios));
+
+	/* enable i2c port expander assert reset line */
+	gpio_request(IOEXP_RESET, "ioexp_rst");
+	gpio_direction_output(IOEXP_RESET, 1);
+}
+#endif
+
 int checkboard(void)
 {
-	puts("Model: Toradex Colibri iMX8X\n");
+	puts("Board: Colibri iMX8QXP \n");
 
 	build_info();
 	print_bootinfo();
@@ -95,28 +140,81 @@ int checkboard(void)
 	return 0;
 }
 
+/* Only Enable USB3 resources currently */
+int board_usb_init(int index, enum usb_init_type init)
+{
+	struct power_domain pd;
+	int ret = 0;
+
+	/* Power on usb */
+	if (!power_domain_lookup_name("conn_usb2", &pd)) {
+		ret = power_domain_on(&pd);
+		if (ret)
+			printf("conn_usb2 Power up failed! (error = %d)\n", ret);
+	}
+
+	if (!power_domain_lookup_name("conn_usb2_phy", &pd)) {
+		ret = power_domain_on(&pd);
+		if (ret)
+			printf("conn_usb2_phy Power up failed! (error = %d)\n", ret);
+	}
+
+	return ret;
+}
+
 int board_init(void)
 {
+#ifdef CONFIG_MXC_GPIO
 	board_gpio_init();
+#endif
+
+#ifdef CONFIG_SNVS_SEC_SC_AUTO
+	{
+		int ret = snvs_security_sc_init();
+
+		if (ret)
+			return ret;
+	}
+#endif
 
 	return 0;
 }
 
+void board_quiesce_devices(void)
+{
+	const char *power_on_devices[] = {
+		"dma_lpuart3",
+
+		/* HIFI DSP boot */
+		"audio_sai0",
+		"audio_ocram",
+	};
+
+	power_off_pd_devices(power_on_devices, ARRAY_SIZE(power_on_devices));
+}
+
+void detail_board_ddr_info(void)
+{
+	puts("\nDDR    ");
+}
+
 /*
  * Board specific reset that is system reset.
  */
 void reset_cpu(ulong addr)
 {
-	/* TODO */
+	sc_pm_reboot(-1, SC_PM_RESET_TYPE_COLD);
+	while(1);
+
 }
 
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
 	return ft_common_board_setup(blob, bd);
 }
 #endif
-
+void board_late_mmc_env_init() {}
 int board_mmc_get_env_dev(int devno)
 {
 	return devno;
@@ -130,5 +228,24 @@ int board_late_init(void)
 	env_set("board_rev", "v1.0");
 #endif
 
+#ifdef CONFIG_AHAB_BOOT
+	env_set("sec_boot", "yes");
+#else
+	env_set("sec_boot", "no");
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+	board_late_mmc_env_init();
+#endif
+
 	return 0;
 }
+
+#ifdef CONFIG_FSL_FASTBOOT
+#ifdef CONFIG_ANDROID_RECOVERY
+int is_recovery_key_pressing(void)
+{
+	return 0; /*TODO*/
+}
+#endif /*CONFIG_ANDROID_RECOVERY*/
+#endif /*CONFIG_FSL_FASTBOOT*/
diff --git a/configs/colibri-imx8qxp_defconfig b/configs/colibri-imx8qxp_defconfig
index 33a0cf0a85..cc96ef54d2 100644
--- a/configs/colibri-imx8qxp_defconfig
+++ b/configs/colibri-imx8qxp_defconfig
@@ -1,54 +1,79 @@
 CONFIG_ARM=y
 CONFIG_ARCH_IMX8=y
 CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFDE00
 CONFIG_DM_GPIO=y
+CONFIG_BOOTAUX_RESERVED_MEM_BASE=0x88000000
+CONFIG_BOOTAUX_RESERVED_MEM_SIZE=0x08000000
 CONFIG_TARGET_COLIBRI_IMX8X=y
+CONFIG_SNVS_SEC_SC=y
 CONFIG_NR_DRAM_BANKS=3
+CONFIG_IMX_BOOTAUX=y
+CONFIG_IMX_VSERVICE_SHARED_BUFFER=0x90400000
 CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg"
+CONFIG_BOOTDELAY=1
 CONFIG_LOG=y
-CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_CMD_CPU=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_IMPORTENV is not set
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DM=y
+CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_UUID=y
 CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_IP_DEFRAG=y
 CONFIG_TFTP_BLOCKSIZE=4096
-CONFIG_CLK_IMX8=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK_IMX8=y
 CONFIG_CPU=y
 CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_IMX_LPI2C=y
-CONFIG_MISC=y
+CONFIG_SYS_I2C_IMX_VIRT_I2C=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_MUX_IMX_VIRT=y
 CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
 CONFIG_FEC_MXC_SHARE_MDIO=y
 CONFIG_FEC_MXC_MDIO_BASE=0x5B040000
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PHY=y
+CONFIG_CDNS3_USB_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX8=y
 CONFIG_POWER_DOMAIN=y
@@ -56,7 +81,22 @@ CONFIG_IMX8_POWER_DOMAIN=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_DM_THERMAL=y
+CONFIG_IMX_SCU_THERMAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_CDNS3=y
+CONFIG_USB_CDNS3_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_SDP_LOADADDR=0x80400000
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_PANIC_HANG=y
 # CONFIG_EFI_LOADER is not set
diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index 311ed439f6..f1b8dfc807 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h
@@ -6,17 +6,14 @@
 #ifndef __COLIBRI_IMX8X_H
 #define __COLIBRI_IMX8X_H
 
-#include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_DISPLAY_BOARDINFO_LATE
-
-#define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define USDHC1_BASE_ADDR		0x5b010000
-#define USDHC2_BASE_ADDR		0x5b020000
-#define CONFIG_SUPPORT_EMMC_BOOT	/* eMMC specific */
+#define CONFIG_SYS_FSL_ESDHC_ADDR       0
+#define USDHC1_BASE_ADDR                0x5B010000
+#define USDHC2_BASE_ADDR                0x5B020000
 
 #define CONFIG_ENV_OVERWRITE
 
@@ -50,44 +47,29 @@
 		"${m4_0_image}\0" \
 	"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
 
-#define MFG_NAND_PARTITION ""
-
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 1) \
 	func(MMC, mmc, 0) \
+	func(USB, usb, 0) \
 	func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
-#undef BOOTENV_RUN_NET_USB_START
-#define BOOTENV_RUN_NET_USB_START ""
-
-#define CONFIG_MFG_ENV_SETTINGS \
-	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
-		"rdinit=/linuxrc g_mass_storage.stall=0 " \
-		"g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \
-		"g_mass_storage.idProduct=0x37FF " \
-		"g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \
-		"${vidargs} clk_ignore_unused\0" \
-	"initrd_addr=0x83800000\0" \
-	"initrd_high=0xffffffff\0" \
-	"bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \
-		"${fdt_addr};\0" \
 
+#define FDT_FILE			"fsl-imx8qxp-colibri-eval-v3.dtb"
+
+#include <config_distro_bootcmd.h>
 /* Initial environment variables */
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	AHAB_ENV \
 	BOOTENV \
-	CONFIG_MFG_ENV_SETTINGS \
+	AHAB_ENV \
 	M4_BOOT_ENV \
 	MEM_LAYOUT_ENV_SETTINGS \
 	"boot_file=Image\0" \
-	"console=ttyLP3 earlycon\0" \
+	"console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200\0" \
 	"fdt_addr=0x83000000\0"	\
-	"fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
-	"fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
+	"fdtfile=" FDT_FILE "\0" \
 	"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
 	"image=Image\0" \
 	"initrd_addr=0x83800000\0" \
-	"initrd_high=0xffffffffffffffff\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 		"root=PARTUUID=${uuid} rootwait " \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
@@ -100,6 +82,7 @@
 		"${fdt_addr}\0" \
 	"panel=NULL\0" \
 	"script=boot.scr\0" \
+	"setup=run mmcargs\0" \
 	"update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \
 		"if test \"$confirm\" = \"y\"; then " \
 		"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
@@ -117,6 +100,8 @@
 #define CONFIG_SYS_MEMTEST_START	0x88000000
 #define CONFIG_SYS_MEMTEST_END		0x89000000
 
+#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+
 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
 #define CONFIG_SYS_MMC_ENV_DEV		0	/* USDHC1 eMMC */
 #define CONFIG_SYS_MMC_ENV_PART		1
@@ -151,7 +136,49 @@
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY		8000000	/* 8MHz */
 
-#define BOOTAUX_RESERVED_MEM_BASE 0x88000000
-#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */
+/* USB Config */
+#define CONFIG_USBD_HS
+
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_GADGET_MASS_STORAGE
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+
+/* USB OTG controller configs */
+#ifdef CONFIG_USB_EHCI_HCD
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif
+
+/* Networking */
+#define CONFIG_FEC_ENET_DEV 0
+
+#if (CONFIG_FEC_ENET_DEV == 0)
+#define IMX_FEC_BASE			0x5B040000
+#define CONFIG_FEC_MXC_PHYADDR          0x0
+#define CONFIG_ETHPRIME                 "eth0"
+#elif (CONFIG_FEC_ENET_DEV == 1)
+#define IMX_FEC_BASE			0x5B050000
+#define CONFIG_FEC_MXC_PHYADDR          0x1
+#define CONFIG_ETHPRIME                 "eth1"
+#endif
+
+#define CONFIG_FEC_XCV_TYPE		RGMII
+#define FEC_QUIRK_ENET_MAC
+#define PHY_ANEG_TIMEOUT 20000
+
+#ifdef CONFIG_DM_VIDEO
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_LOGO
+#endif
 
 #endif /* __COLIBRI_IMX8X_H */