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authorIgor Opaniuk <igor.opaniuk@toradex.com>2020-09-18 14:39:53 +0300
committerIgor Opaniuk <igor.opaniuk@toradex.com>2020-09-18 15:21:08 +0300
commit0cf68ea6bf2dff60d47d6b0d6df3bae264c8e8d8 (patch)
treecb63a9c42eb4e2dd7d390e7223b7bb5741dac153
parent8de0766c227b8e0557e5abb5fbfaae2196349353 (diff)
apalis-imx8: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory layout. Relates-to: ELB-3031 Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
-rw-r--r--board/toradex/apalis-imx8/apalis-imx8.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index 5fbbbb3af4..1add6fba66 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -69,6 +69,29 @@ static void setup_iomux_uart(void)
imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
+void board_mem_get_layout(uint64_t *phys_sdram_1_start,
+ uint64_t *phys_sdram_1_size,
+ uint64_t *phys_sdram_2_start,
+ uint64_t *phys_sdram_2_size)
+{
+ uint32_t is_quadplus = 0, val = 0;
+ sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val);
+
+ if (sciErr == SC_ERR_NONE) {
+ /* QP has one A72 core disabled */
+ is_quadplus = ((val >> 4) & 0x3) != 0x0;
+ }
+
+ *phys_sdram_1_start = PHYS_SDRAM_1;
+ *phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
+ *phys_sdram_2_start = PHYS_SDRAM_2;
+ if (is_quadplus)
+ /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */
+ *phys_sdram_2_size = 0x0UL;
+ else
+ *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
+}
+
int board_early_init_f(void)
{
sc_pm_clock_rate_t rate = SC_80MHZ;