colibri-imx8qxp: fix ethernet functionality

Fix Ethernet functionality. The FEC clock on i.MX 8X really has an
additional by 2 divider plus our design requires the ENET0_RCLK50M_OUT
on the ENET0_RGMII_TXC pin to be turned on for the Micrel PHY.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

5 files changed, 14 insertions, 91 deletions

diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts
index 0d331f7f1d..6195122a26 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri.dts
+++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts
@@ -70,11 +70,11 @@
 
 		pinctrl_fec1: fec1grp {
 			fsl,pins = <
-				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD      0x000014a0
-				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD      0x000014a0
+				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD      0x000014a0 /* Use pads in 3.3V mode */
+				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD      0x000014a0 /* Use pads in 3.3V mode */
 				SC_P_ENET0_MDC_CONN_ENET0_MDC			0x06000020
 				SC_P_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
-				SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x00000061
+				SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x00000061
 				SC_P_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT	0x06000061
 				SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x00000061
 				SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x00000061
diff --git a/arch/arm/mach-imx/imx8/clock.c b/arch/arm/mach-imx/imx8/clock.c
index dff2d405fe..53236c980e 100644
--- a/arch/arm/mach-imx/imx8/clock.c
+++ b/arch/arm/mach-imx/imx8/clock.c
@@ -124,7 +124,11 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
 
 u32 imx_get_fecclk(void)
 {
+#ifdef CONFIG_TARGET_COLIBRI_IMX8QXP
+	return mxc_get_clock(MXC_FEC_CLK)/2;
+#else
 	return mxc_get_clock(MXC_FEC_CLK);
+#endif
 }
 
 static struct imx_i2c_map *get_i2c_desc(unsigned i2c_num)
@@ -432,7 +436,11 @@ void init_clk_fec(int index)
 	/* Configure GPR regisers */
 	sc_misc_set_control(ipc, enet[index], SC_C_TXCLK,  0);
 	sc_misc_set_control(ipc, enet[index], SC_C_CLKDIV,  1); /* Enable divclk */
+#ifdef CONFIG_TARGET_COLIBRI_IMX8QXP
+	sc_misc_set_control(ipc, enet[index], SC_C_DISABLE_50,  0);
+#else
 	sc_misc_set_control(ipc, enet[index], SC_C_DISABLE_50,  1);
+#endif
 	sc_misc_set_control(ipc, enet[index], SC_C_DISABLE_125,  1);
 	sc_misc_set_control(ipc, enet[index], SC_C_SEL_125,  0);
 	sc_misc_set_control(ipc, enet[index], SC_C_IPG_STOP,  0);
diff --git a/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c b/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c
index e476f408c9..b28065a7f2 100644
--- a/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c
+++ b/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c
@@ -42,11 +42,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ESDHC_CLK_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
 						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
-// this is likely the same as in the dts file
-#define ENET_INPUT_PAD_CTRL	((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
-						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
-#define ENET_NORMAL_PAD_CTRL	ENET_INPUT_PAD_CTRL
-
 #define GPIO_PAD_CTRL	((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
 						| (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
@@ -204,74 +199,6 @@ int board_mmc_getcd(struct mmc *mmc)
 #ifdef CONFIG_FEC_MXC
 #include <miiphy.h>
 
-static iomux_cfg_t pad_enet0[] = {
-	SC_P_ENET0_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET0_RGMII_RXD0 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET0_RGMII_RXD1 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET0_RGMII_RXD2 | MUX_MODE_ALT(1) | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET0_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET0_RGMII_TXD0 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET0_RGMII_TXD1 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET0_RGMII_TXC | MUX_MODE_ALT(1) | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-
-	/* Shared MDIO */
-	SC_P_ENET0_MDC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET0_MDIO | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-};
-
-static void setup_iomux_fec(void)
-{
-	imx8_iomux_setup_multiple_pads(pad_enet0, ARRAY_SIZE(pad_enet0));
-}
-
-static void enet_device_phy_reset(void)
-{
-	struct gpio_desc desc;
-	int ret;
-
-	/* The BB_PER_RST_B will reset the ENET1 PHY */
-	if (0 == CONFIG_FEC_ENET_DEV) {
-		ret = dm_gpio_lookup_name("gpio@1a_4", &desc);
-		if (ret)
-			return;
-
-		ret = dm_gpio_request(&desc, "enet0_reset");
-		if (ret)
-			return;
-
-		dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
-		dm_gpio_set_value(&desc, 0);
-		udelay(50);
-		dm_gpio_set_value(&desc, 1);
-	}
-
-	/* The board has a long delay for this reset to become stable */
-	mdelay(200);
-}
-
-int board_eth_init(bd_t *bis)
-{
-	int ret;
-	struct power_domain pd;
-
-	if (CONFIG_FEC_ENET_DEV) {
-		if (!power_domain_lookup_name("conn_enet1", &pd))
-			power_domain_on(&pd);
-	} else {
-		if (!power_domain_lookup_name("conn_enet0", &pd))
-			power_domain_on(&pd);
-	}
-
-	setup_iomux_fec();
-
-	ret = fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,
-		CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
-	if (ret)
-		printf("FEC1 MXC: %s:failed\n", __func__);
-
-	return ret;
-}
-
 int board_phy_config(struct phy_device *phydev)
 {
 	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
@@ -287,14 +214,6 @@ int board_phy_config(struct phy_device *phydev)
 
 	return 0;
 }
-
-static int setup_fec(int ind)
-{
-	/* Reset ENET PHY */
-	enet_device_phy_reset();
-
-	return 0;
-}
 #endif
 
 #undef CONFIG_MXC_GPIO /* TODO */
@@ -394,10 +313,6 @@ int board_init(void)
 	(void) pmic_init();
 #endif
 
-#ifdef CONFIG_FEC_MXC
-	setup_fec(CONFIG_FEC_ENET_DEV);
-#endif
-
 	return 0;
 }
 
diff --git a/configs/colibri-imx8qxp_defconfig b/configs/colibri-imx8qxp_defconfig
index fda5df781e..d27ea02e1a 100644
--- a/configs/colibri-imx8qxp_defconfig
+++ b/configs/colibri-imx8qxp_defconfig
@@ -32,7 +32,9 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_IMX_LPI2C=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
-CONFIG_NETDEVICES=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_DM_ETH=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX8=y
 CONFIG_POWER_DOMAIN=y
diff --git a/include/configs/colibri-imx8qxp.h b/include/configs/colibri-imx8qxp.h
index 0f4ac47cca..7aad8b2367 100644
--- a/include/configs/colibri-imx8qxp.h
+++ b/include/configs/colibri-imx8qxp.h
@@ -46,8 +46,6 @@
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define FEC_QUIRK_ENET_MAC
 
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE		4096
 #define CONFIG_TFTP_TSIZE