MA-12552 Adjust SPL malloc pool and stack address

This commit is basically cherry-picked from:
  commit ced8dc6ce85f2227a29a52d55836b73223e71e73
  Author: Ye Li <ye.li@nxp.com>
  Date:   Mon Aug 20 23:35:20 2018 -0700

      MLK-19263-2 imx8mq_evk: Adjust SPL malloc pool and stack address

      Currently the SRAM is allocated to malloc pool due to large malloc
      needed by USB SDP. The stack is moved to OCRAM. This causes a
      problem when enabling HAB. The HAB authentication needs large
      memory on stack, so after ATF image loaded, the stack overwrites
      the ATF image in OCRAM and causes authentication failed.

      This patch moves the malloc pool to DDR and set back stack to
      SRAM. So SDP still can run with enough memory on DDR. And the
      stack overwrite issue can be fixed by enough memory 24KB left on
      SRAM.

      This change also need to use a early malloc pool by defining the
      CONFIG_MALLOC_F_ADDR. And in SPL codes, we have to adjust DDR init
      before board_init_r.

      Signed-off-by: Ye Li <ye.li@nxp.com>

Change-Id: I37e0d196296b6b25662dda3dbbbc265bdf6d983f
Signed-off-by: Luo Ji <ji.luo@nxp.com>

2 files changed, 23 insertions, 12 deletions

diff --git a/board/freescale/imx8mq_phanbell/spl.c b/board/freescale/imx8mq_phanbell/spl.c
index 970e8f2386..1aef6cd289 100644
--- a/board/freescale/imx8mq_phanbell/spl.c
+++ b/board/freescale/imx8mq_phanbell/spl.c
@@ -177,16 +177,6 @@ int power_init_board(void)
 
 void spl_board_init(void)
 {
-	enable_tzc380();
-
-	/* Adjust pmic voltage to 1.0V for 800M */
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
-	power_init_board();
-
-	/* DDR initialization */
-	spl_dram_init();
-
 #ifndef CONFIG_SPL_USB_SDP_SUPPORT
 	/* Serial download mode */
 	if (is_usb_boot()) {
@@ -194,6 +184,8 @@ void spl_board_init(void)
 		restore_boot_params();
 	}
 #endif
+	init_usb_clk();
+
 	puts("Normal Boot\n");
 }
 
@@ -209,6 +201,7 @@ int board_fit_config_name_match(const char *name)
 
 void board_init_f(ulong dummy)
 {
+	int ret;
 
 	/* Clear global data */
 	memset((void *)gd, 0, sizeof(gd_t));
@@ -226,5 +219,21 @@ void board_init_f(ulong dummy)
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
 
+	ret = spl_init();
+	if (ret) {
+		debug("spl_init() failed: %d\n", ret);
+		hang();
+	}
+
+	enable_tzc380();
+
+	/* Adjust pmic voltage to 1.0V for 800M */
+	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+
+	power_init_board();
+
+	/* DDR initialization */
+	spl_dram_init();
+
 	board_init_r(NULL, 0);
 }
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index 5456f3beb6..abd3ccbc3e 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -36,12 +36,14 @@
 #define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_BSS_START_ADDR      0x00180000
 #define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
-#define CONFIG_SYS_SPL_MALLOC_START    0x00182000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x2000	/* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x800000	/* 8 KB */
 #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
 
+#define CONFIG_MALLOC_F_ADDR            0x182000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+
 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
 
 #undef CONFIG_DM_MMC