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authorYe Li <ye.li@nxp.com>2018-09-13 20:25:18 -0700
committerYe Li <ye.li@nxp.com>2018-09-17 18:48:52 -0700
commit818e636a2b4f73006f1a9546193dac865fee7041 (patch)
tree6af88649edf4f2ea9c6e9c484fff85517dbd237a
parent82d61c0fd30ae6d131b155e2b7840e5a26411ca9 (diff)
MLK-19599 imx8mm_ddr4_evk: Add NAND boot support
Add SPL and u-boot support to load images from RAWNAND device when booting from RAWNAND. The NAND SPL loads the FIT image from nandfit mtdpart at 64MB offset of NAND. Users need uuu to burn the FIT image, kernel, DTB and rootfs to all fixed mtdparts. Since NAND SPL needs large BSS and MALLOC size, this patch also moves the MALLOC pool to DDR, and enable MALLOC_F pool on OCRAM for all malloc before DDR initialization. Signed-off-by: Ye Li <ye.li@nxp.com>
-rw-r--r--board/freescale/imx8mm_evk/spl.c26
-rw-r--r--configs/imx8mm_ddr4_evk_nand_defconfig72
-rw-r--r--include/configs/imx8mm_evk.h41
3 files changed, 127 insertions, 12 deletions
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index 2cea694ed1..6bbda3c3d4 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -203,14 +203,6 @@ int power_init_board(void)
void spl_board_init(void)
{
- enable_tzc380();
-
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
- power_init_board();
- /* DDR initialization */
- spl_dram_init();
-
#ifndef CONFIG_SPL_USB_SDP_SUPPORT
/* Serial download mode */
if (is_usb_boot()) {
@@ -233,6 +225,8 @@ int board_fit_config_name_match(const char *name)
void board_init_f(ulong dummy)
{
+ int ret;
+
/* Clear global data */
memset((void *)gd, 0, sizeof(gd_t));
@@ -247,5 +241,21 @@ void board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
+ ret = spl_init();
+ if (ret) {
+ debug("spl_init() failed: %d\n", ret);
+ hang();
+ }
+
+ enable_tzc380();
+
+ /* Adjust pmic voltage to 1.0V for 800M */
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+
+ power_init_board();
+
+ /* DDR initialization */
+ spl_dram_init();
+
board_init_r(NULL, 0);
}
diff --git a/configs/imx8mm_ddr4_evk_nand_defconfig b/configs/imx8mm_ddr4_evk_nand_defconfig
new file mode 100644
index 0000000000..168afa4c3a
--- /dev/null
+++ b/configs/imx8mm_ddr4_evk_nand_defconfig
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_USB_TCPC=y
+CONFIG_TARGET_IMX8MM_DDR4_EVK=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000"
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_OF_LIBFDT=y
+CONFIG_FS_FAT=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-ddr4-evk"
+CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-ddr4-evk.dtb"
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_OF_CONTROL=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FSL_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x42800000
+CONFIG_FASTBOOT_BUF_SIZE=0x40000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_PMIC=y
+CONFIG_EFI_PARTITION=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_NXP_TMU=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SDP_LOADADDR=0x40400000
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+
+CONFIG_VIDEO=y
+CONFIG_IMX_SEC_MIPI_DSI=y
+
+CONFIG_CMD_NAND=y
+CONFIG_CMD_UBI=y
+CONFIG_NAND_BOOT=y
+CONFIG_ENV_IS_IN_NAND=y \ No newline at end of file
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index d35f1b2728..04342887d2 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -16,7 +16,7 @@
#define CONFIG_CSF_SIZE 0x2000 /* 8K region */
#endif
-#define CONFIG_SPL_MAX_SIZE (124 * 1024)
+#define CONFIG_SPL_MAX_SIZE (148 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
@@ -36,12 +36,14 @@
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_BSS_START_ADDR 0x00910000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
-#define CONFIG_SYS_SPL_MALLOC_START 0x00911000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
+#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_MALLOC_F_ADDR 0x912000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
#undef CONFIG_DM_MMC
@@ -58,6 +60,14 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+#if defined(CONFIG_NAND_BOOT)
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_DMA_SUPPORT
+#define CONFIG_SPL_NAND_MXS
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of first 64MB boot area */
+#endif
+
#endif
#define CONFIG_CMD_READ
@@ -110,6 +120,10 @@
"jh_mmcboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run mmcboot\0 " \
"jh_netboot=setenv fdt_file fsl-imx8mm-evk-root.dtb; setenv jh_clk clk_ignore_unused; run netboot\0 "
+#ifdef CONFIG_NAND_BOOT
+#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs) "
+#endif
+
#define CONFIG_MFG_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS_DEFAULT \
"initrd_addr=0x43800000\0" \
@@ -118,6 +132,22 @@
"sd_dev=0\0" \
/* Initial environment variables */
+#if defined(CONFIG_NAND_BOOT)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_MFG_ENV_SETTINGS \
+ "fdt_addr=0x43000000\0" \
+ "fdt_high=0xffffffffffffffff\0" \
+ "mtdparts=" MFG_NAND_PARTITION "\0" \
+ "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
+ "bootargs=console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 ubi.mtd=5 " \
+ "root=ubi0:nandrootfs rootfstype=ubifs " \
+ MFG_NAND_PARTITION \
+ "\0" \
+ "bootcmd=nand read ${loadaddr} 0x5000000 0x2000000;"\
+ "nand read ${fdt_addr} 0x7000000 0x100000;"\
+ "booti ${loadaddr} - ${fdt_addr}"
+
+#else
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
JAILHOUSE_ENV \
@@ -183,6 +213,7 @@
"fi; " \
"fi; " \
"else booti ${loadaddr} - ${fdt_addr}; fi"
+#endif
/* Link Definitions */
#define CONFIG_LOADADDR 0x40480000
@@ -206,6 +237,8 @@
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#elif defined(CONFIG_ENV_IS_IN_NAND)
+#define CONFIG_ENV_OFFSET (60 << 20)
#endif
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */