diff options
| author | Ye Li <ye.li@nxp.com> | 2018-09-19 01:50:15 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-09-19 19:02:12 -0700 |
| commit | 4a5895bb208a51d505437dcbd7afdf81429cec9e (patch) | |
| tree | abdc9bba71e68cdd9cc9bd5eb8a1bcb58e6ed8a0 | |
| parent | b4f5416c1a0c5171827082522aade00785e4367f (diff) | |
MLK-19627 arm: Round the dma_alloc_coherent memory size to cache line aligned
When running uuu on iMX8MQ, meet USB enumeration failure in fastboot.
The root cause is a cache issue in dwc3 driver. When the issue happens, the ctrl_req in
gadget driver is allocated at 0xfe932f40, and the usb_composite_dev (cdev)
is allocated at 0xfe932f60. So after we submit the setup request (cache flushed) to USB
controller, any accessing to usb_composite_dev variable will cause the cache refill, then
when setup transfer is completed, reading the setup data in ctrl_req will gets old value from
cache not from memory.
The ctrl_req is allocated by API dma_alloc_coherent, but u-boot don't have cohernet memory.
so it still needs cache maintain operations before/after HW accessing. Since the cache flush or
invalidate bases on cache line, so when the allocated memory size is not cache line aligned,
potentially it may meet such issue.
This patch modifies the dma_alloc_coherent API to round the size to cache line aligned.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/include/asm/dma-mapping.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 287466800e..4f2ac95f73 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -14,7 +14,7 @@ static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) { - *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len); + *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, ROUND(len, ARCH_DMA_MINALIGN)); return (void *)*handle; } |