apalis-imx8: fix Ethernet

Make sure that all pins connected to the Micrel KSZ9031 PHY
are muxed. Properly reset the PHY after all muxing has been
applied. This makes sure that strapping is not overwritten by
the SoC default mux (particularly it makes sure that CLK125_NDO
is not driven low during reset).

Make sure to not use CONFIG_DM_ETH as it seems to break ETH
support as is.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
(cherry picked from commit f0a1ceb6f5e2ab3b3618190541b1e7a9fd4c1e4a)
(cherry picked from commit 8f6405070189a8744c2f6a9d9a6e041554fb9046)
(cherry picked from commit 6f24c637fd7725a27249d6a950f587134f30b97c)

3 files changed, 89 insertions, 205 deletions

diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index 95355297d2..c6dc0d9a03 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -225,28 +225,45 @@ int board_mmc_getcd(struct mmc *mmc)
 
 #endif /* CONFIG_FSL_ESDHC */
 
+#ifdef CONFIG_MXC_GPIO
+
+#define LVDS_ENABLE IMX_GPIO_NR(1, 6)
+#define MIPI_ENABLE IMX_GPIO_NR(1, 7)
+#define DEBUG_LED   IMX_GPIO_NR(2, 15)
+#define IOEXP_RESET IMX_GPIO_NR(1, 12)
+
+static iomux_cfg_t board_gpios[] = {
+	SC_P_LVDS0_I2C0_SCL | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
+	SC_P_LVDS0_I2C0_SDA | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
+	SC_P_LVDS1_I2C0_SCL | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
+	SC_P_SPDIF0_TX | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
+};
+
+static void board_gpio_init(void)
+{
+	imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios));
+
+	gpio_request(DEBUG_LED, "debug_led");
+	gpio_direction_output(DEBUG_LED, 1);
+
+	/* enable i2c port expander assert reset line */
+	gpio_request(IOEXP_RESET, "ioexp_rst");
+	gpio_direction_output(IOEXP_RESET, 1);
+
+	/* enable LVDS SAS boards */
+	gpio_request(LVDS_ENABLE, "lvds_enable");
+	gpio_direction_output(LVDS_ENABLE, 1);
+
+	/* enable MIPI SAS boards */
+	gpio_request(MIPI_ENABLE, "mipi_enable");
+	gpio_direction_output(MIPI_ENABLE, 1);
+}
+#endif
 
 #ifdef CONFIG_FEC_MXC
 #include <miiphy.h>
 
-static iomux_cfg_t pad_enet1[] = {
-	SC_P_ENET1_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET1_RGMII_RXD0 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET1_RGMII_RXD1 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET1_RGMII_RXD2 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET1_RGMII_RXD3 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
-	SC_P_ENET1_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET1_RGMII_TXD0 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET1_RGMII_TXD1 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET1_RGMII_TXD2 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET1_RGMII_TXD3 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-
-	/* Shared MDIO */
-	SC_P_ENET0_MDC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-	SC_P_ENET0_MDIO | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
-};
+#define ETH_RESET   IMX_GPIO_NR(1, 11)
 
 static iomux_cfg_t pad_enet0[] = {
 	SC_P_ENET0_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL),
@@ -261,50 +278,27 @@ static iomux_cfg_t pad_enet0[] = {
 	SC_P_ENET0_RGMII_TXD2 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
 	SC_P_ENET0_RGMII_TXD3 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
 	SC_P_ENET0_RGMII_TXC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
+	SC_P_ENET0_REFCLK_125M_25M | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
 
 	/* Shared MDIO */
 	SC_P_ENET0_MDC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
 	SC_P_ENET0_MDIO | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL),
+
+	/*  Ethernet PHY reset */
+	SC_P_LVDS1_GPIO01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
 };
 
 static void setup_iomux_fec(void)
 {
-	if (0 == CONFIG_FEC_ENET_DEV)
-		imx8_iomux_setup_multiple_pads(pad_enet0, ARRAY_SIZE(pad_enet0));
-	else
-		imx8_iomux_setup_multiple_pads(pad_enet1, ARRAY_SIZE(pad_enet1));
+	imx8_iomux_setup_multiple_pads(pad_enet0, ARRAY_SIZE(pad_enet0));
 }
 
 static void enet_device_phy_reset(void)
 {
-	struct gpio_desc desc;
-	int ret;
-
-	if (0 == CONFIG_FEC_ENET_DEV) {
-		ret = dm_gpio_lookup_name("gpio@18_1", &desc);
-		if (ret)
-			return;
-
-		ret = dm_gpio_request(&desc, "enet0_reset");
-		if (ret)
-			return;
-	} else {
-		ret = dm_gpio_lookup_name("gpio@18_4", &desc);
-		if (ret)
-			return;
-
-		ret = dm_gpio_request(&desc, "enet1_reset");
-		if (ret)
-			return;
-	}
-
-	dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
-	dm_gpio_set_value(&desc, 0);
-	udelay(50);
-	dm_gpio_set_value(&desc, 1);
-
-	/* The board has a long delay for this reset to become stable */
-	mdelay(200);
+	gpio_request(ETH_RESET, "ETH_RESET#");
+	gpio_direction_output(ETH_RESET, 0);
+	mdelay(10);
+	gpio_set_value(ETH_RESET, 1);
 }
 
 int board_eth_init(bd_t *bis)
@@ -312,19 +306,14 @@ int board_eth_init(bd_t *bis)
 	int ret;
 	struct power_domain pd;
 
-	printf("[%s] %d\n", __func__, __LINE__);
-
-	if (CONFIG_FEC_ENET_DEV) {
-		if (!power_domain_lookup_name("conn_enet1", &pd))
-			power_domain_on(&pd);
-	} else {
-		if (!power_domain_lookup_name("conn_enet0", &pd))
-			power_domain_on(&pd);
-	}
+	if (!power_domain_lookup_name("conn_enet0", &pd))
+		power_domain_on(&pd);
 
 	setup_iomux_fec();
 
-	ret = fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,
+	enet_device_phy_reset();
+
+	ret = fecmxc_initialize_multi(bis, 0,
 		CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
 	if (ret)
 		printf("FEC1 MXC: %s:failed\n", __func__);
@@ -334,78 +323,11 @@ int board_eth_init(bd_t *bis)
 
 int board_phy_config(struct phy_device *phydev)
 {
-#ifdef CONFIG_FEC_ENABLE_MAX7322
-	uint8_t value;
-
-	/* This is needed to drive the pads to 1.8V instead of 1.5V */
-	i2c_set_bus_num(CONFIG_MAX7322_I2C_BUS);
-
-	if (!i2c_probe(CONFIG_MAX7322_I2C_ADDR)) {
-		/* Write 0x1 to enable O0 output, this device has no addr */
-		/* hence addr length is 0 */
-		value = 0x1;
-		if (i2c_write(CONFIG_MAX7322_I2C_ADDR, 0, 0, &value, 1))
-			printf("MAX7322 write failed\n");
-	} else {
-		printf("MAX7322 Not found\n");
-	}
-	mdelay(1);
-#endif
-
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
-
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
-
 	if (phydev->drv->config)
 		phydev->drv->config(phydev);
 
 	return 0;
 }
-
-static int setup_fec(int ind)
-{
-	/* Reset ENET PHY */
-	enet_device_phy_reset();
-
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_MXC_GPIO
-
-#define LVDS_ENABLE IMX_GPIO_NR(1, 6)
-#define MIPI_ENABLE IMX_GPIO_NR(1, 7)
-#define DEBUG_LED   IMX_GPIO_NR(2, 15)
-#define IOEXP_RESET IMX_GPIO_NR(1, 12)
-
-static iomux_cfg_t board_gpios[] = {
-	SC_P_LVDS0_I2C0_SCL | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-	SC_P_LVDS0_I2C0_SDA | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-	SC_P_LVDS1_I2C0_SCL | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-	SC_P_SPDIF0_TX | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-};
-
-static void board_gpio_init(void)
-{
-	imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios));
-
-	gpio_request(DEBUG_LED, "debug_led");
-	gpio_direction_output(DEBUG_LED, 1);
-
-	/* enable i2c port expander assert reset line */
-	gpio_request(IOEXP_RESET, "ioexp_rst");
-	gpio_direction_output(IOEXP_RESET, 1);
-
-	/* enable LVDS SAS boards */
-	gpio_request(LVDS_ENABLE, "lvds_enable");
-	gpio_direction_output(LVDS_ENABLE, 1);
-
-	/* enable MIPI SAS boards */
-	gpio_request(MIPI_ENABLE, "mipi_enable");
-	gpio_direction_output(MIPI_ENABLE, 1);
-}
 #endif
 
 int checkboard(void)
@@ -486,10 +408,6 @@ int board_init(void)
 	board_gpio_init();
 #endif
 
-#ifdef CONFIG_FEC_MXC
-	setup_fec(CONFIG_FEC_ENET_DEV);
-#endif
-
 #ifdef CONFIG_FSL_HSIO
 	imx8qm_hsio_initialize();
 #ifdef CONFIG_SCSI_AHCI_PLAT
diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig
index 130a186f3b..29972a3d3b 100644
--- a/configs/apalis-imx8_defconfig
+++ b/configs/apalis-imx8_defconfig
@@ -1,72 +1,56 @@
 CONFIG_ARM=y
 CONFIG_ARCH_IMX8=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis"
-CONFIG_TARGET_APALIS_IMX8=y
-CONFIG_CMD_IMPORTENV=n
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_DM=y
-CONFIG_CMD_CACHE=y
-
-CONFIG_DM_SERIAL=y
-CONFIG_FSL_LPUART=y
-CONFIG_OF_CONTROL=y
-CONFIG_DM_I2C=y
-# CONFIG_DM_I2C_COMPAT is not set
-CONFIG_SYS_I2C_IMX_LPI2C=y
+CONFIG_TARGET_APALIS_IMX8=y
+CONFIG_IMX_BOOTAUX=y
+CONFIG_VIDEO=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis"
+CONFIG_BOOTDELAY=3
+# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y
-
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_IMX8=y
-
-CONFIG_DM_USB=y
-CONFIG_USB_EHCI_HCD=y
-
 CONFIG_CMD_USB=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-
 CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="FSL"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
-
 CONFIG_CMD_GPIO=y
-CONFIG_DM_GPIO=y
-CONFIG_BOOTDELAY=3
-CONFIG_IMX_BOOTAUX=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_FAT=y
-CONFIG_CMD_MMC=y
-CONFIG_DM_MMC=y
 # CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_IMX_LPI2C=y
+CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
-CONFIG_FSL_FSPI=y
-CONFIG_DM_SPI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_4BYTES_ADDR=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_CMD_SF=y
-
-CONFIG_CMD_PING=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_DM_ETH=y
-# CONFIG_EFI_LOADER is not set
-
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-
-CONFIG_VIDEO=y
-
+CONFIG_NETDEVICES=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX8=y
-
 CONFIG_POWER_DOMAIN=y
 CONFIG_IMX8_POWER_DOMAIN=y
-
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_FSPI=y
 CONFIG_DM_THERMAL=y
 CONFIG_IMX_SC_THERMAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="FSL"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h
index cae44d8d54..15e0d13f26 100644
--- a/include/configs/apalis-imx8.h
+++ b/include/configs/apalis-imx8.h
@@ -71,30 +71,12 @@
 
 #define CONFIG_PHY_GIGE /* Support for 1000BASE-X */
 #define CONFIG_PHYLIB
-#define CONFIG_PHY_ATHEROS
+#define CONFIG_PHY_MICREL
+#define CONFIG_PHY_MICREL_KSZ9031
 
-/* ENET0 connects AR8031 on CPU board, ENET1 connects to base board */
-#define CONFIG_FEC_ENET_DEV 0
-
-#if (CONFIG_FEC_ENET_DEV == 0)
 #define IMX_FEC_BASE			0x5B040000
-#define CONFIG_FEC_MXC_PHYADDR          0x0
-#define CONFIG_ETHPRIME                 "eth0"
-#elif (CONFIG_FEC_ENET_DEV == 1)
-#define IMX_FEC_BASE			0x5B050000
-#define CONFIG_FEC_MXC_PHYADDR          0x1
-#define CONFIG_FEC_ENABLE_MAX7322
-#define CONFIG_ETHPRIME                 "eth1"
-#endif
-
-/* ENET0 MDIO are shared */
-#define CONFIG_FEC_MXC_MDIO_BASE	0x5B040000
-
-/* MAX7322 */
-#ifdef CONFIG_FEC_ENABLE_MAX7322
-#define CONFIG_MAX7322_I2C_ADDR		0x68
-#define CONFIG_MAX7322_I2C_BUS		2 /* I2C2 */
-#endif
+#define CONFIG_FEC_MXC_PHYADDR		7
+#define CONFIG_ETHPRIME			"FEC"
 
 /* Boot M4 */
 #define M4_BOOT_ENV \