summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAbel Vesa <abel.vesa@nxp.com>2018-09-28 18:02:49 +0300
committerYe Li <ye.li@nxp.com>2018-10-10 01:59:42 -0700
commit0b19c665d5fe6a19f928f79d888562f84274c42d (patch)
treec056e888fcd5e180d453313616b6a64dec497bdc
parent6c3fa4d8a868ce54f5e1ba407ee544f6f4c7ecf9 (diff)
MLK-19789 mach-imx: imx8: Make the eMMC container offset SOC dependant
This is a hack for imx8qm-mek, since the offset of the flash.bin image on eMMC differs when compared to imx8qxp-mek. Basically, the default value is 32K, but for 8qm-mek it's 0. This can go away once the qm and qxp get aligned (again) from this point of view. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e9f87deae7e8cb3e71012f85c488e0a0d108762a)
-rw-r--r--arch/arm/include/asm/arch-imx8/image.h1
-rw-r--r--arch/arm/mach-imx/imx8/image.c38
2 files changed, 32 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-imx8/image.h b/arch/arm/include/asm/arch-imx8/image.h
index 2958b49771..22592bcdc8 100644
--- a/arch/arm/include/asm/arch-imx8/image.h
+++ b/arch/arm/include/asm/arch-imx8/image.h
@@ -7,6 +7,7 @@
#define HASH_MAX_LEN 64
#define CONTAINER_HDR_ALIGNMENT 0x400
+#define CONTAINER_HDR_EMMC_OFFSET 0
#define CONTAINER_HDR_MMCSD_OFFSET SZ_32K
#define CONTAINER_HDR_QSPI_OFFSET SZ_4K
diff --git a/arch/arm/mach-imx/imx8/image.c b/arch/arm/mach-imx/imx8/image.c
index a274433913..e4417ad1a9 100644
--- a/arch/arm/mach-imx/imx8/image.c
+++ b/arch/arm/mach-imx/imx8/image.c
@@ -10,6 +10,8 @@
#include <mmc.h>
#include <spi_flash.h>
#include <asm/arch/image.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/boot_mode.h>
#define MMC_DEV 0
#define QSPI_DEV 1
@@ -92,18 +94,40 @@ static int get_container_size(void *dev, int dev_type, unsigned long offset)
return ret;
}
+static unsigned long get_boot_device_offset(void *dev, int dev_type)
+{
+ unsigned long offset = 0;
+ if (dev_type == MMC_DEV) {
+ struct mmc *mmc = (struct mmc*)dev;
+
+ if (IS_SD(mmc) || mmc->part_config == MMCPART_NOAVAILABLE) {
+ offset = CONTAINER_HDR_MMCSD_OFFSET;
+ } else {
+ u8 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
+
+ if (part == 1 || part == 2) {
+ if (is_imx8qxp() && is_soc_rev(CHIP_REV_B))
+ offset = CONTAINER_HDR_MMCSD_OFFSET;
+ else
+ offset = CONTAINER_HDR_EMMC_OFFSET;
+ } else {
+ offset = CONTAINER_HDR_MMCSD_OFFSET;
+ }
+ }
+ } else if (dev_type == QSPI_DEV) {
+ offset = CONTAINER_HDR_QSPI_OFFSET;
+ }
+
+ return offset;
+}
+
static int get_imageset_end(void *dev, int dev_type)
{
unsigned long offset1 = 0, offset2 = 0;
int value_container[2];
- if (dev_type == MMC_DEV) {
- offset1 = CONTAINER_HDR_MMCSD_OFFSET;
- offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
- } else if (dev_type == QSPI_DEV) {
- offset1 = CONTAINER_HDR_QSPI_OFFSET;
- offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
- }
+ offset1 = get_boot_device_offset(dev, dev_type);
+ offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
value_container[0] = get_container_size(dev, dev_type, offset1);
if (value_container[0] < 0) {