diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2017-12-13 10:56:10 +0800 |
|---|---|---|
| committer | Haibo Chen <haibo.chen@nxp.com> | 2017-12-13 14:11:45 +0800 |
| commit | 96abb0500fc732a0ec80efc27be0824e39c560ea (patch) | |
| tree | 9d2e3059b3fce462fa27c5c0fc420fe8eb36b06a | |
| parent | 2ced3bf4c22d61ec776f05b5c6185a966d986c2f (diff) | |
MLK-17189 imx8qxp: change the USDHC_CLK_ROOT source from AVPLL
Currently, the DPLL of conn ss is not stable, will cause usdhc
data CRC error. So here change USDHC_CLK_ROOT source from AVPLL
as a workaround. And config USDHC1_CLK_ROOT to 333MHz, USDHC2_CLK_ROOT
to 200MHz. This workaround do not impact SD performance, but decrease
the eMMC performance, HS400ES work clock change from 198MHz to 166MHz,
read performance drop about 10%, write performance drop about 6%.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit c573014c0bd3e5d111c7078ae03dbe1c066db3c1)
| -rw-r--r-- | arch/arm/cpu/armv8/imx8/clock.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/imx8/clock.c b/arch/arm/cpu/armv8/imx8/clock.c index bd34f45e64..3f2027aeb5 100644 --- a/arch/arm/cpu/armv8/imx8/clock.c +++ b/arch/arm/cpu/armv8/imx8/clock.c @@ -261,6 +261,23 @@ void init_clk_usdhc(u32 index) if (index >= instances) return; + /* + * IMX8QXP USDHC_CLK_ROOT default source from DPLL, but this DPLL + * do not stable, will cause usdhc data transfer crc error. So here + * is a workaround, let USDHC_CLK_ROOT source from AVPLL. Due to + * AVPLL is fixed to 1000MHz, so here config USDHC1_CLK_ROOT to 333MHz, + * USDHC2_CLK_ROOT to 200MHz, make eMMC HS400ES work at 166MHz, and SD + * SDR104 work at 200MHz. + */ +#ifdef CONFIG_IMX8QXP + err = sc_pm_set_clock_parent(ipc, usdhcs[index], 2, SC_PM_PARENT_PLL1); + if (err != SC_ERR_NONE) + printf("SDHC_%d set clock parent failed!(error = %d)\n", index, err); + + if (index == 1) + actual = 200000000; +#endif + err = sc_pm_set_clock_rate(ipc, usdhcs[index], 2, &actual); if (err != SC_ERR_NONE) { printf("SDHC_%d set clock failed! (error = %d)\n", index, err); |