diff options
| author | Ye Li <ye.li@nxp.com> | 2017-11-29 00:21:12 -0600 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-11-29 01:25:00 -0600 |
| commit | 5d48b34348957ac7484b5c60eeebbf4dbeab336f (patch) | |
| tree | b40846a7936d2f2f7f69fc072833d31a65bf6605 | |
| parent | 5176bcb214bbb582c990273187fd752552455035 (diff) | |
MLK-17021 imx8m: Fix thermal temp printed not aligning with kernel
The TMU calibration data in u-boot DTB is not updated, so the temperature
we got in u-boot won't exceed 40C.
This patch updates the TMU node with latest kernel DTB
(commit ee0a9fbdca80b058c00d74c6afa70558f6c1dcc6)
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/dts/fsl-imx8mq.dtsi | 90 |
1 files changed, 45 insertions, 45 deletions
diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi index e3056af14c..8e27a0eda0 100644 --- a/arch/arm/dts/fsl-imx8mq.dtsi +++ b/arch/arm/dts/fsl-imx8mq.dtsi @@ -225,50 +225,50 @@ interrupt = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; little-endian; u-boot,dm-pre-reloc; - fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>; - fsl,tmu-calibration = <0x00000000 0x00000020 - 0x00000001 0x00000028 - 0x00000002 0x00000030 - 0x00000003 0x00000038 - 0x00000004 0x00000040 - 0x00000005 0x00000048 - 0x00000006 0x00000050 - 0x00000007 0x00000058 - 0x00000008 0x00000060 - 0x00000009 0x00000068 - 0x0000000a 0x00000070 - 0x0000000b 0x00000077 - - 0x00010000 0x00000057 - 0x00010001 0x0000005b - 0x00010002 0x0000005f - 0x00010003 0x00000063 - 0x00010004 0x00000067 - 0x00010005 0x0000006b - 0x00010006 0x0000006f - 0x00010007 0x00000073 - 0x00010008 0x00000077 - 0x00010009 0x0000007b - 0x0001000a 0x0000007f - - 0x00020000 0x00000002 - 0x00020001 0x0000000e - 0x00020002 0x0000001a - 0x00020003 0x00000026 - 0x00020004 0x00000032 - 0x00020005 0x0000003e - 0x00020006 0x0000004a - 0x00020007 0x00000056 - 0x00020008 0x00000062 - - 0x00030000 0x00000000 - 0x00030001 0x00000008 - 0x00030002 0x00000010 - 0x00030003 0x00000018 - 0x00030004 0x00000020 - 0x00030005 0x00000028 - 0x00030006 0x00000030 - 0x00030007 0x00000038>; + fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>; + fsl,tmu-calibration = <0x00000000 0x00000023 + 0x00000001 0x00000029 + 0x00000002 0x0000002f + 0x00000003 0x00000035 + 0x00000004 0x0000003d + 0x00000005 0x00000043 + 0x00000006 0x0000004b + 0x00000007 0x00000051 + 0x00000008 0x00000057 + 0x00000009 0x0000005f + 0x0000000a 0x00000067 + 0x0000000b 0x0000006f + + 0x00010000 0x0000001b + 0x00010001 0x00000023 + 0x00010002 0x0000002b + 0x00010003 0x00000033 + 0x00010004 0x0000003b + 0x00010005 0x00000043 + 0x00010006 0x0000004b + 0x00010007 0x00000055 + 0x00010008 0x0000005d + 0x00010009 0x00000067 + 0x0001000a 0x00000070 + + 0x00020000 0x00000017 + 0x00020001 0x00000023 + 0x00020002 0x0000002d + 0x00020003 0x00000037 + 0x00020004 0x00000041 + 0x00020005 0x0000004b + 0x00020006 0x00000057 + 0x00020007 0x00000063 + 0x00020008 0x0000006f + + 0x00030000 0x00000015 + 0x00030001 0x00000021 + 0x00030002 0x0000002d + 0x00030003 0x00000039 + 0x00030004 0x00000045 + 0x00030005 0x00000053 + 0x00030006 0x0000005f + 0x00030007 0x00000071>; #thermal-sensor-cells = <0>; }; @@ -285,7 +285,7 @@ type = "passive"; }; cpu_crit0: trip1 { - temperature = <125000>; + temperature = <95000>; hysteresis = <2000>; type = "critical"; }; |