diff options
author | Fugang Duan <fugang.duan@nxp.com> | 2017-12-07 09:42:24 +0800 |
---|---|---|
committer | Fugang Duan <fugang.duan@nxp.com> | 2017-12-08 09:40:42 +0800 |
commit | 1f5fadf3940f595c6898ed28f2828b41ade32ef7 (patch) | |
tree | fd6286e99a8dfb924f411ad553ca7b20561c68bf | |
parent | 3535868b89df84d3e6554114f7867f9ef908ff01 (diff) |
MLK-17093 imx8qm/qxp: enable control bit for RGMII interface RX clock delay
Due to RGMII interface timing requirement for imx8qm/qxp mek and arm2
board, it needs to enable RX clock delay.
It should not depend on HW default status since kernel may clear the
bit only on imx8qm/qxp platforms, then reboot test will cause uboot
networking failed.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
-rw-r--r-- | board/freescale/imx8qm_arm2/imx8qm_arm2.c | 2 | ||||
-rw-r--r-- | board/freescale/imx8qm_mek/imx8qm_mek.c | 2 | ||||
-rw-r--r-- | board/freescale/imx8qxp_arm2/imx8qxp_arm2.c | 2 | ||||
-rw-r--r-- | board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 |
4 files changed, 8 insertions, 0 deletions
diff --git a/board/freescale/imx8qm_arm2/imx8qm_arm2.c b/board/freescale/imx8qm_arm2/imx8qm_arm2.c index 20ec7e010b..1b730f8d60 100644 --- a/board/freescale/imx8qm_arm2/imx8qm_arm2.c +++ b/board/freescale/imx8qm_arm2/imx8qm_arm2.c @@ -366,6 +366,8 @@ int board_phy_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c index 794404e4bb..d4d08ea433 100644 --- a/board/freescale/imx8qm_mek/imx8qm_mek.c +++ b/board/freescale/imx8qm_mek/imx8qm_mek.c @@ -184,6 +184,8 @@ int board_phy_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); diff --git a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c index ce1bba31d6..362957de27 100644 --- a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c +++ b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c @@ -333,6 +333,8 @@ int board_phy_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 79bec62ced..b17ade2d9d 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -318,6 +318,8 @@ int board_phy_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); |