diff options
| author | Ye Li <ye.li@nxp.com> | 2018-09-03 01:50:00 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-09-03 02:38:21 -0700 |
| commit | c738b76a70390a5ed4eb66e9a044178ff07d7418 (patch) | |
| tree | 8af17f8c2a504391724c3ad1ef3b11d3dfac81ef | |
| parent | 74697e36df34dae033337b8b4591a7c2b95360fb (diff) | |
MLK-19355 imx8mm: Enable sec_debug clock in SPL
ipg_stop from GPC is not connected to WDOG directly, the sec_debug clock is
used to sample the ipg_stop from GPC. So when this clock is off, ipg_stop input
of WDOG can’t assert, WDOG will fail to stop in DSM mode.
Enable this clock forever in SPL, so other SW don't need to touch it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 1da6c9b3a837d15c25086af449462d5e8b56c290)
| -rw-r--r-- | arch/arm/cpu/armv8/imx8m/clock_imx8mm.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/imx8m/clock_imx8mm.c b/arch/arm/cpu/armv8/imx8m/clock_imx8mm.c index f8359d5931..a6da91cd8a 100644 --- a/arch/arm/cpu/armv8/imx8m/clock_imx8mm.c +++ b/arch/arm/cpu/armv8/imx8m/clock_imx8mm.c @@ -717,6 +717,8 @@ int clock_init() clock_enable(CCGR_ECSPI2, 1); clock_enable(CCGR_ECSPI3, 1); + clock_enable(CCGR_SEC_DEBUG, 1); + enable_display_clk(1); return 0; }; |