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authorJim Lin <jilin@nvidia.com>2012-06-24 20:40:57 +0000
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2014-04-16 10:34:01 +0200
commit3cd662da4222b27a54dc7bc56d2856aa58f77c22 (patch)
tree404f7eae50621bb89842a8c8aeaa8c8027e9a4c3
parentbfdae04de981c841c33f65452ca0613e373bbdf1 (diff)
tegra: usb: Fix device enumeration problem of USB1
tegra: usb: Fix device enumeration problem of USB1 A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra.h1
-rw-r--r--drivers/usb/host/ehci-tegra.c24
2 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index dc588ce6b2..2a8f9c96ae 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -63,6 +63,7 @@
#define EMEM_DEVSIZE_SHIFT (16)
#define NV_PA_FUSE_BASE 0x7000F800
#define NV_PA_CSITE_BASE 0x70040000
+#define TEGRA_USB_ADDR_MASK 0xFFFFC000
#define TEGRA_SDRC_CS0 NV_PA_SDRAM_BASE
#define LOW_LEVEL_SRAM_STACK 0x4000FFFC
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index fca7abef29..2083ec0e81 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2009 NVIDIA Corporation
+ * Copyright (c) 2009-2012 NVIDIA Corporation
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -28,6 +28,28 @@
#include <asm/errno.h>
#include <asm/arch/usb.h>
+#if !defined(CONFIG_TEGRA3)
+#define TEGRA_USB1_BASE 0xC5000000
+#else
+#define TEGRA_USB1_BASE 0x7D000000
+#endif
+
+/*
+ * A known hardware issue where Connect Status Change bit of PORTSC register
+ * of USB1 controller will be set after Port Reset.
+ * We have to clear it in order for later device enumeration to proceed.
+ * This ehci_powerup_fixup overrides the weak function ehci_powerup_fixup
+ * in "ehci-hcd.c".
+ */
+void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
+{
+ wait_ms(50);
+ if (((u32) status_reg & TEGRA_USB_ADDR_MASK) != TEGRA_USB1_BASE)
+ return;
+ /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */
+ if (ehci_readl(status_reg) & EHCI_PS_CSC)
+ *reg |= EHCI_PS_CSC;
+}
/*
* Create the appropriate control structures to manage