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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-10-18 10:29:38 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-10-18 10:29:38 +0200 |
| commit | 117e28bcf917a211e0e04e9e7a56fdac98af805b (patch) | |
| tree | 0820ffb925f0f9901a04a454b568253de93dbc92 | |
| parent | 6c5163e9e1d67219157413f651380290727ef27c (diff) | |
tegra 30: PMIC init comment
Add comment concerning PMIC initialisation of VDD_CPU via VDDCtrl.
| -rw-r--r-- | arch/arm/cpu/armv7/tegra-common/ap20.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra-common/ap20.c b/arch/arm/cpu/armv7/tegra-common/ap20.c index 4f54dd6121..65a9dd3b3e 100644 --- a/arch/arm/cpu/armv7/tegra-common/ap20.c +++ b/arch/arm/cpu/armv7/tegra-common/ap20.c @@ -340,9 +340,13 @@ static void enable_cpu_power_rail(enum tegra_family_t family) * For now we do this here. We need to find out what this is * doing, tidy up the code and find a better place for it. */ + /* Write to i2c addr 2d, 2 byte data length, i.e. the PMIC */ tegra_i2c_ll_write_addr(0x005a, 0x0002); + /* Write 28 then 23, Register 0x28, 0x23: VDDCtrl Voltage to + 1000mV */ tegra_i2c_ll_write_data(0x2328, 0x0a02); udelay(1000); + /* Write 27 then 1, Register 0x27, 1: VDDCtrl Voltage On */ tegra_i2c_ll_write_data(0x0127, 0x0a02); udelay(10 * 1000); } |