diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2012-01-24 12:04:14 +0530 |
|---|---|---|
| committer | Gerrit <chrome-bot@google.com> | 2012-02-24 12:25:28 -0800 |
| commit | 754fe016cbc0cf6f1e0a9d32afbdfeb0a3cdddee (patch) | |
| tree | 729bbd5c323b980b97c0e6f1b6b33f84ad281864 | |
| parent | 84915137edff81e466a22b192cefe33002fe95cc (diff) | |
arm: tegra3: add PMC registers
These registers would be useful for the warmboot code.
BUG=chromium-os:23496
TEST=build for Cardhu, Waluigi and Seaboard
Change-Id: I58f52b6b8653d72b2e842ee44bdf3632eff304a2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/14690
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/pmc.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h index 14a129e7f5..9d1a0a8175 100644 --- a/arch/arm/include/asm/arch-tegra/pmc.h +++ b/arch/arm/include/asm/arch-tegra/pmc.h @@ -119,6 +119,17 @@ struct pmc_ctlr { uint pmc_sys_33v_en; /* _SYS_33V_EN_0, offset 154 */ uint pmc_bo_mirror_access; /* _BOUNDOUT_MIRROR_ACCESS_0, off158 */ uint pmc_gate; /* _GATE_0, offset 15C */ +#if defined(CONFIG_TEGRA3) + uint pmc_unused[51]; /* currently unused: 160 ~ 228 */ + uint pmc_scratch43; /* _SCRATCH43_0, offset 22C */ + uint pmc_scratch44; /* _SCRATCH44_0, offset 230 */ + uint pmc_scratch45; /* _SCRATCH45_0, offset 234 */ + uint pmc_scratch46; /* _SCRATCH46_0, offset 238 */ + uint pmc_scratch47; /* _SCRATCH47_0, offset 23C */ + uint pmc_scratch48; /* _SCRATCH48_0, offset 240 */ + uint pmc_scratch49; /* _SCRATCH49_0, offset 244 */ + uint pmc_scratch50; /* _SCRATCH50_0, offset 248 */ +#endif }; #define PWRGATE_ENABLE 0x100 |