diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2017-04-02 23:59:43 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-04-04 14:53:42 +0200 |
| commit | 866a1c2d3d1bdaa7d0fad72b94b428c23bce7bcc (patch) | |
| tree | f6443a504de1c62a249095854d5c608772a2bdd8 | |
| parent | 22ef6deb1eb03b7c0478cf6d84152525082f1bf1 (diff) | |
imx: serial_mxc: disable ri and dcd irq in dte mode
If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits to prevent an interrupt storm when Linux enables
the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | drivers/serial/serial_mxc.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index 4fd2b1dd05..ed95883dd4 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -295,7 +295,10 @@ static int mxc_serial_probe(struct udevice *dev) writel(0, &uart->cr1); writel(0, &uart->cr2); while (!(readl(&uart->cr2) & UCR2_SRST)); - writel(0x704 | UCR3_ADNIMP, &uart->cr3); + if (plat->use_dte) + writel(0x404 | UCR3_ADNIMP, &uart->cr3); + else + writel(0x704 | UCR3_ADNIMP, &uart->cr3); writel(0x8000, &uart->cr4); writel(0x2b, &uart->esc); writel(0, &uart->tim); |