diff options
| author | Thierry Reding <treding@nvidia.com> | 2014-08-26 17:34:17 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2014-10-11 01:12:25 +0200 |
| commit | 3f5d07130f12b5c95f3c79f66d44962dd64d716e (patch) | |
| tree | 56e3d29407105738980af35dd852ffff5bb7b28a | |
| parent | b069565243fc81cde3057d4c866cd282095bca75 (diff) | |
ARM: tegra: Add GIC for Tegra124
Add a device tree node for the GIC v2 found on the Cortex-A15 CPU
complex of Tegra124. U-Boot doesn't use this but subsequent patches will
add device tree nodes that reference it by phandle.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/dts/tegra124.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi index a756336185..1b603d2f07 100644 --- a/arch/arm/dts/tegra124.dtsi +++ b/arch/arm/dts/tegra124.dtsi @@ -7,6 +7,19 @@ / { compatible = "nvidia,tegra124"; + interrupt-parent = <&gic>; + + gic: interrupt-controller@50041000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x50041000 0x1000>, + <0x50042000 0x2000>, + <0x50044000 0x2000>, + <0x50046000 0x2000>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; tegra_car: clock@60006000 { compatible = "nvidia,tegra124-car"; |