Revert "MLK-11408-2 imx: mx7d: Isolate 26 IP resources to domain 0 for A core"

This reverts commit e7d4767331f1a2cbef61b4e89beb73731f267499.

3 files changed, 0 insertions, 55 deletions

diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index 58621ce7d0..e30493e2d4 100644
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -18,10 +18,6 @@
 #include <dm.h>
 #include <imx_thermal.h>
 #include <mxsfb.h>
-#ifdef CONFIG_MXC_RDC
-#include <asm/imx-common/rdc-sema.h>
-#include <asm/arch/imx-rdc.h>
-#endif
 #ifdef CONFIG_FSL_FASTBOOT
 #ifdef CONFIG_ANDROID_RECOVERY
 #include <recovery.h>
@@ -43,50 +39,6 @@ U_BOOT_DEVICE(imx7_thermal) = {
 };
 #endif
 
-#ifdef CONFIG_MXC_RDC
-static rdc_peri_cfg_t const resources[] = {
-    (RDC_PER_SIM1 | RDC_DOMAIN(0)),
-    (RDC_PER_SIM2 | RDC_DOMAIN(0)),
-    (RDC_PER_UART1 | RDC_DOMAIN(0)),
-    (RDC_PER_UART2 | RDC_DOMAIN(0)),
-    (RDC_PER_UART3 | RDC_DOMAIN(0)),
-    (RDC_PER_UART4 | RDC_DOMAIN(0)),
-    (RDC_PER_UART5 | RDC_DOMAIN(0)),
-    (RDC_PER_UART6 | RDC_DOMAIN(0)),
-    (RDC_PER_UART7 | RDC_DOMAIN(0)),
-    (RDC_PER_SAI1 | RDC_DOMAIN(0)),
-    (RDC_PER_SAI2 | RDC_DOMAIN(0)),
-    (RDC_PER_SAI3 | RDC_DOMAIN(0)),
-    (RDC_PER_WDOG1 | RDC_DOMAIN(0)),
-    (RDC_PER_WDOG2 | RDC_DOMAIN(0)),
-    (RDC_PER_WDOG3 | RDC_DOMAIN(0)),
-    (RDC_PER_WDOG4 | RDC_DOMAIN(0)),
-    (RDC_PER_GPT1 | RDC_DOMAIN(0)),
-    (RDC_PER_GPT2 | RDC_DOMAIN(0)),
-    (RDC_PER_GPT3 | RDC_DOMAIN(0)),
-    (RDC_PER_GPT4 | RDC_DOMAIN(0)),
-    (RDC_PER_PWM1 | RDC_DOMAIN(0)),
-    (RDC_PER_PWM2 | RDC_DOMAIN(0)),
-    (RDC_PER_PWM3 | RDC_DOMAIN(0)),
-    (RDC_PER_PWM4 | RDC_DOMAIN(0)),
-    (RDC_PER_ENET1 | RDC_DOMAIN(0)),
-    (RDC_PER_ENET2 | RDC_DOMAIN(0)),
-};
-
-static void isolate_resource(void)
-{
-    /* At default, all resources are in domain 0 - 3. Here we setup 
-     * some resources to domain 0 where M4 codes will move the M4
-     * out of this domain. Then M4 is not able to access them any longer.
-     * This is a workaround for ic issue. In current design, if any peripheral 
-     * was assigned to both A7 and M4, it will receive ipg_stop or ipg_wait 
-     * when any of the 2 platforms enter low power mode. So M4 sleep will cause
-     * some peripherals fail to work at A core side.
-     */
-    imx_rdc_setup_peripherals(resources, ARRAY_SIZE(resources));
-}
-#endif
-
 u32 get_cpu_rev(void)
 {
 	struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *)
@@ -215,9 +167,6 @@ int arch_cpu_init(void)
 
 	set_epdc_qos();
 
-#ifdef CONFIG_MXC_RDC
-    isolate_resource();
-#endif
 	return 0;
 }
 
diff --git a/include/configs/mx7d_arm2.h b/include/configs/mx7d_arm2.h
index fe1f22f08c..e19774c8ab 100644
--- a/include/configs/mx7d_arm2.h
+++ b/include/configs/mx7d_arm2.h
@@ -100,8 +100,6 @@
 #define CONFIG_CMD_SETEXPR
 
 #ifdef CONFIG_CMD_BOOTAUX
-#define CONFIG_MXC_RDC /* Enable RDC to isolate the peripherals for A7 and M4 */
-
 #define UPDATE_M4_ENV \
 	"m4image=m4_qspi.bin\0" \
 	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 2324a31a36..385cafac0d 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -123,8 +123,6 @@
 #define CONFIG_CMD_SETEXPR
 
 #ifdef CONFIG_CMD_BOOTAUX
-#define CONFIG_MXC_RDC /* Enable RDC to isolate the peripherals for A7 and M4 */
-
 #define UPDATE_M4_ENV \
 	"m4image=m4_qspi.bin\0" \
 	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \