diff options
| author | Eric Nelson <eric.nelson@boundarydevices.com> | 2013-04-10 15:36:13 -0700 |
|---|---|---|
| committer | Robert Winkler <robert.winkler@boundarydevices.com> | 2013-06-17 12:08:27 -0700 |
| commit | 849ac4287d2c73a9e6e0c938b39acd5b76a757cc (patch) | |
| tree | 9f02a9ac30f220ff5e24f5fb0763bedd21614388 | |
| parent | 8dc7db002fc987cd6068f4230684182112fa5534 (diff) | |
i.MX6: Add enable_cko1() routine
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 14 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/clock.h | 21 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 3c0d908d17..760cbd77b1 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -434,6 +434,20 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return -1; } +void enable_clko1(unsigned parent, unsigned div) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg = readl(&mxc_ccm->ccosr); + + /* prevent noise on SGTL5000 by supplying clock */ + reg &= ~(MXC_CCM_CCOSR_CKOL_DIV_MASK + |MXC_CCM_CCOSR_CKOL_SEL_MASK); + reg |= MXC_CCM_CCOSR_CKOL_EN + | (div<<MXC_CCM_CCOSR_CKOL_DIV_OFFSET) + | (parent<<MXC_CCM_CCOSR_CKOL_SEL_OFFSET); + writel(reg,&mxc_ccm->ccosr); +} + /* * Dump some core clockes. */ diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index cfd4edcb5e..6dcc8506b2 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -66,4 +66,25 @@ void enable_usboh3_clk(unsigned char enable); int enable_sata_clock(void); int enable_i2c_clk(unsigned char enable, unsigned i2c_num); +enum mxc_clko1_parents { + CLKO1_PLL3_SW_CLK, + CLKO1_PLL2_MAIN_CLK, + CLKO1_PLL1_MAIN_CLK, + CLKO1_PLL5_MAIN_CLK, + CLKO1_VIDEO_27M_CLK_ROOT, + CLKO1_AXI_CLK_ROOT, + CLKO1_ENFC_CLK_ROOT, + CLKO1_IPU1_DI0_CLK_ROOT, + CLKO1_IPU1_DI1_CLK_ROOT, + CLKO1_IPU2_DI0_CLK_ROOT, + CLKO1_IPU2_DI1_CLK_ROOT, + CLKO1_AHB_CLK_ROOT, + CLKO1_IPG_CLK_ROOT, + CLKO1_PERCLK_ROOT, + CLKO1_CKIL_SYNC_CLK_ROOT, + CLKO1_PLL4_MAIN_CLK, +}; + +void enable_clko1(unsigned parent, unsigned div); + #endif /* __ASM_ARCH_CLOCK_H */ |