diff options
| author | Serah Peterson <speterson@phytec.com> | 2013-07-28 19:53:12 -0700 |
|---|---|---|
| committer | Anthony Felice <tony.felice@timesys.com> | 2013-08-28 18:27:03 -0400 |
| commit | b83402db963329917a4a9ed58159c025d5c588eb (patch) | |
| tree | b724f02a826a2603d39ab8d13f0b2099573979a7 | |
| parent | de7d2d435d0466e168ff117ddf718e8db8870fd2 (diff) | |
PHYTEC: FEC1: support added for ETH1
To use FEC1 instead of FEC0 on the phyCORE-Vybrid, modify
include/configs/pcm052.h and replace #undef CONFIG_PCM052_FEC1
with #define CONFIG_PCM052_FEC1
FEC1/ETH1 is the only available ethernet port on the
Cosmic board and is enabled by default.
Signed-off-by: Serah Peterson <speterson@phytec.com>
Signed-off-by: Russell Robinson Jr <rrobinson@phytec.com>
| -rw-r--r-- | drivers/net/mcffec.c | 12 | ||||
| -rw-r--r-- | drivers/net/mcfmii.c | 26 | ||||
| -rw-r--r-- | include/configs/pcm052.h | 8 |
3 files changed, 45 insertions, 1 deletions
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 1f59794102..9709d37076 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -52,6 +52,8 @@ #define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY) #define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST) +#define FEC1_INDEX 1 + DECLARE_GLOBAL_DATA_PTR; struct fec_info_s fec_info[] = { @@ -569,7 +571,11 @@ int mcffec_initialize(bd_t * bis) u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; #endif +#if (defined(CONFIG_PCM052_FEC1) || defined(CONFIG_MACH_PCL052)) + for (i = FEC1_INDEX; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { +#else for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { +#endif dev = (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, @@ -623,10 +629,16 @@ int mcffec_initialize(bd_t * bis) miiphy_register(dev->name, mcffec_miiphy_read, mcffec_miiphy_write); #endif +#if !(defined(CONFIG_PCM052_FEC1) || defined(CONFIG_MACH_PCL052)) if (i > 0) fec_info[i - 1].next = &fec_info[i]; +#endif } +#if (defined(CONFIG_PCM052_FEC1) || defined(CONFIG_MACH_PCL052)) + fec_info[FEC1_INDEX].next = &fec_info[FEC1_INDEX]; +#else fec_info[i - 1].next = &fec_info[0]; +#endif /* default speed */ bis->bi_ethspeed = 10; diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index 63f1fd98ad..8984a5c5ca 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -52,6 +52,12 @@ DECLARE_GLOBAL_DATA_PTR; #define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \ (REG & 0x1f) << 18) | (VAL & 0xffff)) +/* Definitions for KSZ8051 PHY - 50 MHz mode */ +#define KSZ8051_PHY_BASIC_CTRL 0x00 +#define KSZ8051_PHY_CTRL2 0x1F +#define KSZ8051_RESET (1 << 15) +#define KSZ8051_50MHZ_CLK_MODE (1 << 7) + #ifndef CONFIG_SYS_UNSPEC_PHYID # define CONFIG_SYS_UNSPEC_PHYID 0 #endif @@ -82,6 +88,7 @@ phy_info_t phyinfo[] = { {0x001378e0, "LXT971"}, /* LXT971 and 972 */ {0x00221619, "KS8721BL"}, /* Micrel KS8721BL/SL */ {0x00221512, "KSZ8041NL"}, /* Micrel KSZ8041NL */ + {0x00221550, "KSZ8051"}, /* Micrel KSZ8051 */ {0x20005CE1, "N83640"}, /* National 83640 */ {0x20005C90, "N83848"}, /* National 83848 */ {0x20005CA2, "N83849"}, /* National 83849 */ @@ -231,6 +238,7 @@ void __mii_init(void) int miispd = 0, i = 0; u16 status = 0; u16 linkgood = 0; + u16 regval = 0; /* retrieve from register structure */ dev = eth_get_dev(); @@ -254,6 +262,24 @@ void __mii_init(void) info->phy_addr = mii_discover_phy(dev); +#if (defined(CONFIG_MACH_PCM052) && defined(CONFIG_PCM052_FEC1)) + // KSZ8051 in 50 MHz mode + // Check that the device was properly reset + if(0 == strcmp(dev->name, "FEC1")) { + regval = 0; + if (0 == miiphy_read(dev->name, info->phy_addr, KSZ8051_PHY_BASIC_CTRL, ®val)) { + // reset the PHY + regval |= KSZ8051_RESET; + miiphy_write(dev->name, info->phy_addr, KSZ8051_PHY_BASIC_CTRL, regval); + } + // Set FEC1 for 50 MHz mode + regval = 0; + miiphy_read(dev->name, info->phy_addr, KSZ8051_PHY_CTRL2, ®val); + regval |= KSZ8051_50MHZ_CLK_MODE; + miiphy_write(dev->name, info->phy_addr, KSZ8051_PHY_CTRL2, regval); + } +#endif + while (i < MCFFEC_TOUT_LOOP) { status = 0; i++; diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 6b0b2b1ec3..1493edd93d 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -161,7 +161,14 @@ # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 # define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61 + +# undef CONFIG_PCM052_FEC1 // if defined, use ETH1 instead of ETH0 +# ifdef CONFIG_PCM052_FEC1 +# define CONFIG_ETHPRIME "FEC1" +# else # define CONFIG_ETHPRIME "FEC0" +# endif + # define CONFIG_IPADDR 192.168.3.10 # define CONFIG_NETMASK 255.255.255.0 # define CONFIG_SERVERIP 192.168.3.11 @@ -180,7 +187,6 @@ #endif #define CONFIG_BOOTDELAY 3 -#define CONFIG_ETHPRIME "FEC0" #define CONFIG_LOADADDR 0x80010000 /* loadaddr env var */ #define CONFIG_ARP_TIMEOUT 200UL |